Abstract
This paper describes the evolution steps used within the Philips company on the development of a high speed analog to digital converter (ADC) with a low power consumption and a small die size. Analog preprocessing of the input signal before conversion to binary information is a key function in all the explained systems.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
R.J. v.d. Plassche, P. Baltus, “An 8 bit 100 MHz Full Nyquist ADC”, IEEE Journal of Solid State Circuits, Vol. 23, No. 6, December 1988, pp. 1334–1344.
R. v.d. Grift et al., “An 8 bit video ADC incorporating folding and interpolation techniques”, IEEE Journal of Solid State Circuits, Vol. 22, No. 6, December 1987, pp. 944–953.
R.J. v.d. Plassche, “High speed and high resolution analog to digital and digital to analog converters”, Ph.D. Thesis, Delft University of Technology, Delft, The Netherlands, 1989.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1993 Springer Science+Business Media Dordrecht
About this chapter
Cite this chapter
van Valburg, J., van de Plassche, R.J. (1993). High Speed Folding ADC’s. In: Huijsing, J.H., van der Plassche, R.J., Sansen, W. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-2233-8_8
Download citation
DOI: https://doi.org/10.1007/978-1-4757-2233-8_8
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5131-1
Online ISBN: 978-1-4757-2233-8
eBook Packages: Springer Book Archive