Placement, Floorplanning and Pin Assignment

  • Naveed A. Sherwani

Abstract

After the circuit partitioning phase, the area occupied by each block (subcircuit) can be calculated and the number of terminals (pins) required by each block is known. In addition, the netlist specifying the connections between the blocks is also available. In order to complete the layout, we need to arrange the blocks on the layout surface and interconnect their pins according to the netlist. The arrangement of blocks is done in the placement phase, while interconnection is completed in the routing phase. In the placement phase, blocks are assigned a specific shape and are positioned on a layout surface, in a such a fashion that no two blocks are overlapping and enough space is left on the layout surface to complete the interconnections between the blocks. The blocks are positioned so as to minimize the total area of the layout. In addition, the locations of pins on each block are also determined.

Keywords

Steiner Tree Simulated Annealing Algorithm Placement Problem Placement Algorithm Design Style 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1993

Authors and Affiliations

  • Naveed A. Sherwani
    • 1
  1. 1.Western Michigan UniversityUSA

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