Abstract
We overview in this chapter the hardware modeling language and synthesis flow in Hercules and Hebe. Section 2.1 describes the modeling of hardware behavior using HardwareC [KM90a]. HardwareC supports constraint specification and external synchronizations. Section 2.2 presents a brief overview of the overall synthesis flow in Hercules and Hebe.
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© 1992 Springer Science+Business Media New York
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Ku, D.C., De Micheli, G. (1992). System Overview. In: High Level Synthesis of ASICs under Timing and Synchronization Constraints. The Springer International Series in Engineering and Computer Science, vol 177. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-2117-1_2
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DOI: https://doi.org/10.1007/978-1-4757-2117-1_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5129-8
Online ISBN: 978-1-4757-2117-1
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