This chapter describes the experimental results and design experiences in using the Hercules and Hebe high-level synthesis programs. Several digital ASIC designs were synthesized using this system, including an Ethernet coprocessor [GC91], a Digital Audio input output (DAIO) chip [LBMG89], a bi-dimensional discrete cosine transform (BDCT) chip [RM89], a decoder chip for the space telescope [Kas89], a raster line drawing design, an error-correcting code design, and a greatest common divisor design. Each design was described completely in HardwareC and synthesized to a logic-level implementation. Extensive logic-level simulation demonstrated the correctness of the specification and implementation.
KeywordsDirect Memory Access Synthesis Result Area Cost Simulation Trace Critical Path Delay
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