Concurrent Statements

Abstract

This chapter discusses VHDL concurrent statements. It contains the following sections:

• The Process

• Concurrent Signal Assignment

• Conditional Signal Assignment

• Selective Signal Assignment

• Concurrent Procedure Call

• BLOCK Statement

A hardware description language documents systems that perform parallel operations. During simulation, components in these systems are “run” at the same simulated time, as explained earlier in Chapter 5. Concurrent statements are used to express this kind of parallel behavior. Concurrent descriptions can be structural (using components — see Chapter 7) or behavioral. The key concurrent statement is the process that is described in detail in Chapter 3.