Introduction

  • Duncan Moore Henry Walker
Chapter
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 33)

Abstract

Integrated circuit manufacturers find it highly desirable to be able to predict yield loss before a chip is fabricated. The ability to predict yield enables corrective action to be taken before production starts. Corrective action may include changing design rules or process conditions or changing the chip design to add redundancy. The goal of such changes is to maximize the number of good chips per wafer, and thus maximize profits. Waiting for production probe data in order to estimate yield is too costly because it comes much too late in the product cycle.

Keywords

Fault Analysis Chip Sample Functional Yield Circuit Fault Fabrication Line 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1987

Authors and Affiliations

  • Duncan Moore Henry Walker
    • 1
  1. 1.Carnegie Mellon UniversityUSA

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