Abstract
Integrated circuit manufacturers find it highly desirable to be able to predict yield loss before a chip is fabricated. The ability to predict yield enables corrective action to be taken before production starts. Corrective action may include changing design rules or process conditions or changing the chip design to add redundancy. The goal of such changes is to maximize the number of good chips per wafer, and thus maximize profits. Waiting for production probe data in order to estimate yield is too costly because it comes much too late in the product cycle.
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© 1987 Springer Science+Business Media Dordrecht
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Walker, D.M.H. (1987). Introduction. In: Yield Simulation for Integrated Circuits. The Springer International Series in Engineering and Computer Science, vol 33. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-1931-4_1
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DOI: https://doi.org/10.1007/978-1-4757-1931-4_1
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5201-1
Online ISBN: 978-1-4757-1931-4
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