Abstract
Augmented data manipulator networks are multistage interconnection networks which implement at each stage interconnection functions present in the single stage network known as PM2I network or barrel shifter. These multistage networks include the ADM (Augmented Data Manipulator) and IADM (Inverse Augmented Data Manipulator) networks, which have been extensively studied and proposed for use in multiprocessor systems. This paper derives new partially augmented networks based on the solution to the shortest path problem in the PM2I network. The new networks include: the HADM (Half Augmented Data Manipulator) and HIADM (Half Inverse Augmented Data Manipulator) networks which have half the number of stages of the ADM and IADM networks, the MADM (Minimum Augmented Data Manipulator) and the MIADM (Minimum Inverse Augmented Data Manipulator) networks which have the minimum link complexity required for one-to-one connections in a network of size N with log4 N stages of uniform switches, and the Extra Stage MADM and MIADM networks which are fault-tolerant versions of the MADM and MIADM networks that can tolerate at least three switch failures. The derivations of these networks are presented and their properties and advantages over other designs are analyzed.
This research was supported in part by the National Science Foundation under Grant DC18419745 and by the Innovative Science and Technology Office of the Strategic Defense Initiative Organization and was administered through the Office of Naval Research under contract No. 00014-85-k-0588.
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© 1988 Plenum Press, New York
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Rau, D., Fortes, J.A.B. (1988). Partially Augmented Data Manipulator Networks: Minimal Designs and Fault Tolerance. In: Tewksbury, S.K., Dickinson, B.W., Schwartz, S.C. (eds) Concurrent Computations. Springer, Boston, MA. https://doi.org/10.1007/978-1-4684-5511-3_27
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DOI: https://doi.org/10.1007/978-1-4684-5511-3_27
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