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Analyzing the Connectivity and Bandwidth of Multiprocessors with Multi-stage Interconnection Networks

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Abstract

When implementing multi-processing systems consisting of a large number of processors, memory modules and interconnection switches, we must expect some of the system elements to become faulty. These faults may be the result of manufacturing defects or failures that occur while the system is already in operation. If the system is allowed to continue its operation in the presence of a few faulty elements, we need to predict the performance of the degraded system.

In this paper, we analyze the performance of multi-processor systems with a multistage interconnection network in the presence of faulty elements. We propose the use of two measures for performance, namely, bandwidth and connectivity. We then derive expressions for these measures for a non-redundant system and for a system with redundancy in its interconnection network. Finally, we compare the two systems through some numerical examples.

This work was supported in part by NSF under contract DCR-85-09423.

On leave from the Technion, Haifa Israel

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References

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© 1988 Plenum Press, New York

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Koren, I., Koren, Z. (1988). Analyzing the Connectivity and Bandwidth of Multiprocessors with Multi-stage Interconnection Networks. In: Tewksbury, S.K., Dickinson, B.W., Schwartz, S.C. (eds) Concurrent Computations. Springer, Boston, MA. https://doi.org/10.1007/978-1-4684-5511-3_26

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  • DOI: https://doi.org/10.1007/978-1-4684-5511-3_26

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4684-5513-7

  • Online ISBN: 978-1-4684-5511-3

  • eBook Packages: Springer Book Archive

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