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Factoring Numbers on the Massively Parallel Computer

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Abstract

The Massively Parallel Processor (MPP) is a high speed parallel bit processor which has been designed and built by Goodyear Aeronautics for NASA. It has recently been installed at Goddard Space Flight center at Greenbelt, MD and is to be primarily used as an image processor for satellite communication. It is ideally suited for an implementation of the continued fraction factoring algorithm of Micheal Morrison and John Brillhart [2] and this paper will first describe the MPP computer and its associated software, then present the proposed implementation of the continued fraction algorithm, and finally present an optimization procedure and a running time analysis which will provide some estimates as to the expected execution time for factoring various size numbers.

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References

  1. D. E. Knuth and L. Trabb Pardo, “Analysis of a simple factorization algorithm”, Theoritical Computer Science 3 (1976) 321–348.

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  2. M. A. Morrison and J. Brillhart, “A Method of factoring and the factorization of F7”, Math. Comp. 29 (1975), 183–205.

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  3. C. Pomerance, “Analysis and comparison of some integer factoring algorithms”, to appear in Computational Methods in Number Theory, H. W. Lenstra, Jr. and R. Tijdeman, Math. Centrum, Amsterdam.

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  4. C. Pomerance and S. S. Wagstaff, Jr., “Implementation of the continued fraction integer factoring algorithm”, Congressus Numeratium, 37 (1983), pp. 99–118.

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© 1984 Plenum Press, New York

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Wunderlich, M.C. (1984). Factoring Numbers on the Massively Parallel Computer. In: Chaum, D. (eds) Advances in Cryptology. Springer, Boston, MA. https://doi.org/10.1007/978-1-4684-4730-9_8

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  • DOI: https://doi.org/10.1007/978-1-4684-4730-9_8

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4684-4732-3

  • Online ISBN: 978-1-4684-4730-9

  • eBook Packages: Springer Book Archive

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