Abstract
The general subject of array processing [ 1 to 7] has been a topic of considerable study since the 1950s as both system designers and users have sought to improve performance and price/performance. The results of these studies have led researchers and designers to explore numerous design alternatives and means of achieving greater concurrency and hence performance. The multiplicity of these approaches has grown so diverse as to completely obfuscate the meaning of the term “array processor.” The term is now commonly used in reference to machine designs including arrays of processing elements (both SIMD, single-instruction multiple-data stream; and MIMD, multiple-instruction multiple-data stream designs), as well as pipelined vector instruction processors, associative processors, algorithmic processors and other designs optimized to processing arrays of data efficiently. Table I below presents a brief taxonomy with examples of the various types of “array processors” available commercially today. A list of supplemental references is appended to papers on machines not described herein.
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References
C.V. Ramamoorthy and H.F. Li, “Pipeline Architecture,” ACM Computing Surveys, Vol. 9, No. 1, (March 1977), pp. 61–102.
K.J. Thurber and L.D. Wald, “Associative and Parallel Processors,” ACM Computing Surveys, Vol. 7, No. 4, (December 1975), pp. 215–255.
K.J. Thurber, Large Scale Computer Architecture — Parallel and Associative Processors, Hayden Book Company, Rochelle Park, N.J., (1976).
S.S. Yau and H.S. Fung, “Associative Processor Architecture — A Survey,” ACM Computing Surveys, Vol. 9, No. 1, (March 1977), pp. 3–27.
T.C. Chen, “Unconventional Superspeed Computer Systems,” AFIPS 1971 Spring Joint Computer Conference, AFIPS Press, Montvale, N.J., (1971), pp.365–371.
T.C. Chen, “Parallelism, Pipelining and Computer Efficiency,” Computer Design, (January 1971), pp. 69-74.
M.J. Flynn, “Some Computer Organizations and Their Effectiveness,” IEEE Transactions on Computers, Vol. C-21, No. 9, (September 1972), pp. 948–960.
G. Paul and M. Wayne Wilson, “The VECTRAN Language: An Experimental Language for Vector/Matrix Array Processing,” IBM Palo Alto Scientific Center report G320-3334 (August 1975).
G. Paul and M. Wayne Wilson, “An Introduction to VECTRAN and Its Use in Scientific Applications Programming,” Los Alamos Workshop on Vector and Parallel Processors, (September 1978).
P.B. Schneck, Ed., “Proceedings of a Conference on Programming Languages and Compilers for Parallel and Vector Machines,” ACM SIGPLAN Notices, Vol. 10, No. 3 (March 1975).
Control Data Corporation, Control Data STAR-100 Computer — Hardware Reference Manual, Manual No. 60256000.
Control Data Corporation, STAR FORTRAN Language Version 2 Reference Manual, Manual No. 60386200.
Texas Instruments, Inc., Description of the ASC System — Parts 1 to 5, Manual Nos. 934662 to 934666.
Texas Instruments, Inc., ASC FORTRAN Reference Manual, Manual No. 930044.
Cray Research, Inc., CRAY-I Computing System — Reference Manual, Manual No. 2240004.
Cray Research, Inc., CRAY-I Computer System Preliminary CRAY FORTRAN (CFT) Reference Manual, Manual No. 2240009.
G.H. Barnes, et al, “The ILLIAC IV Computer,” IEEE Trans. Computers, Vol. C-17, No. 8, (August 1968), pp. 746–757.
A.J. Evansen and J.L. Troy, “Introduction to the Architecture of a 288-element PEPE,” Proc. 1973 Sagamore Conference on Parallel Processing, Springer-Verlag, New York, (1973), pp. 162–169.
P.M. Flanders, et al, “Efficient High Speed Computing with the Distributed Array Processor,” in High Speed Computer and Algorithm Organization, edited by D.J. Kuck, et al, Academic Press, New York, (1977), pp. 113–128.
K.E. Batcher, “STARAN Parallel Processor System Hardware,” Proc. AFIPS 1974 National Computer Conf., Vol. 43, AFIPS Press, Montvale, N.J., (1974), pp. 405–410.
L.C. Higbie, “The OMEN Computers: Associative Array Processors,” IEEE COMPCON (1972), pp. 287-290.
International Business Machines, Inc., Custom Equipment Description: 2938 Array Processor, Form No. GA24-3519.
International Business Machines, Inc., IBM 3838 Array Processor Functional Characteristics, Form No. GA24-3639.
L.P. Schoene, “Master Data Processor,” IBM FSD Technical Directions, Vol. 3, No. 2, (Autumn 1977), pp. 2–6.
G.R. Allen, et al, “The Design and Use of Special Purpose Processors for the Machine Processing of Remotely Sensed Data,” Conference on Machine Processing of Remotely Sensed Data, Purdue University, October 16–18, 1973.
Anon, “Array Processing,” Sperry Rand Engineering Vol. 2, No. 4, (1971), pp. 2–8.
Floating Point Systems, Inc., AP-120B Array Transform Processor, Manual No. FPS-7259.
Datawest Corporation, Real Time Series of Micro-Programmable Array Transform Processors, Product Bulletin Series B.
CSP, Inc., An Introduction to the MAP Series — Models 100, 200 and 300.
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Paul, G. (1979). Large-Scale Vector/Array Processors. In: Stucki, P. (eds) Advances in Digital Image Processing. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-8282-3_14
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