Abstract
The CDC 6600, CDC 7600, and IBM 360/91 performed at peak speed when processing highly regular data. Programmers, intent on maximizing performance, optimized inner loops by counting machine cycles to assure that memory and register conflicts were minimized and that pipelines were full. Both manual and compiler techniques were aimed at creating machine code enabling loops to take advantage of the IBM 360/91 hardware’s loop mode. Similar approaches were employed with the CDC 7600. STACKLIB, a collection of subroutines which processed arrays of data, was developed to permit the CDC 7600 to operate at maximum speed. Utilizing tightly coded loops to process vectors of data suggested the development of a hardware implementation.
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© 1987 Kluwer Academic Publishers
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Schneck, P.B. (1987). The Cray-1. In: Supercomputer Architecture. The Kluwer International Series in Engineering and Computer Science, vol 31. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-7957-1_7
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DOI: https://doi.org/10.1007/978-1-4615-7957-1_7
Publisher Name: Springer, Boston, MA
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