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A Formalization of the IEEE 1149.1–1990 Diagnostic Methodology as Applied to Multichip Modules

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Part of the book series: Frontiers in Electronic Testing ((FRET,volume 7))

Abstract

Much has already been written concerning the IEEE 1149.1 Boundary-Scan standard and its application to the detection of manufacturing defects [1–3]. However, when circuits such as Multichip Modules (MCMs) which are difficult and expensive to repair are involved, much more is required of a diagnostic engine than the mere detection of a defect. The cost of the dice on a module make it imperative that the diagnostic procedures implemented by a tester be exact. It is not enough to just state that “Node <m> is shorted to node <n>”, or that “Node <p> is stuck at 1”, as is frequently the case with printed-circuit board diagnostics. MCM diagnostics must examine the data returned from the test and, as far as is possible, state not only the symptom of the fault, but also its exact cause and location. This article presents a set of formalized diagnostic rules which will, whenever possible, determine the symptom, cause, and location of a manufacturing defect.

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References

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© 1997 Springer Science+Business Media New York

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Posse, K., Zorian, Y. (1997). A Formalization of the IEEE 1149.1–1990 Diagnostic Methodology as Applied to Multichip Modules. In: Zorian, Y. (eds) Multi-Chip Module Test Strategies. Frontiers in Electronic Testing, vol 7. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-6107-1_11

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  • DOI: https://doi.org/10.1007/978-1-4615-6107-1_11

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-7798-6

  • Online ISBN: 978-1-4615-6107-1

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