Abstract
In the context of low power behavioral synthesis, automatic techniques must be developed that minimize the switching activity on globally shared busses and register files, that select low power modules while satisfying the timing constraints, and that schedule operations to minimize the switching activity from one cycle step to next.
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© 1999 Springer Science+Business Media New York
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Chang, JM., Pedram, M. (1999). Power-Optimal Register Allocation and Binding. In: Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-5199-7_2
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DOI: https://doi.org/10.1007/978-1-4615-5199-7_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-7368-1
Online ISBN: 978-1-4615-5199-7
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