Parallel Performance Debugging

Abstract

Parallel programs are much more difficult to develop, debug, maintain, and understand than their sequential counterparts. One reason is the difficulty in establishing correctness - which must take into account temporal conditions: liveness, deadlock-freeness, process synchronization and communication, this is often called correctness debugging. Another reason is the diversity of parallel architectures and the need to produce a highly efficient program finely tuned to the specific target architectures. The impact of task granularity on a parallel algorithm, the properties of the memory hierarchy, and the intricacies involved in the exploitation of multilevel parallelism, should all be carefully analyzed and used to devise a transformation strategy for the program. The adaptation of an initially inefficient algorithm to a specific hardware is often called performance debugging, a term that suggests that the correctness criteria for a parallel algorithm should include requirements for its performance on a given architecture. An inefficient but otherwise correct program is of practically no use for execution on a parallel system.