Abstract
The reduction algebra defined in the previous chapter can be thought of as taking in a stream of characters and spitting out a transformed stream of characters. It is important to establish that this algebra can successfully reduce the input stream to a reduced normal form that cannot be further reduced by the algebra (irreducibility property). It is also useful to establish that if the reduction algebra can take two different paths in reducing the input stream, both paths lead to the same final reduced form (completeness property). Intuitively, our reduction algebra seems to have both of the above properties since all reduction functions except SA-REDUCE output a process statement on which only SA-REDUCE can be applied. Once SA-REDUCE is applied, there are no further reductions. The following sections prove the above properties formally through an embedding of the reduction algebra in the automated proof checker PVS. The following sections presents a brief introduction to PVS and the embedding of the algebra in PVS.
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© 1999 Springer Science+Business Media New York
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Umamageswaran, K., Pandey, S.L., Wilsey, P.A. (1999). Completeness of the Reduced Form. In: Formal Semantics and Proof Techniques for Optimizing VHDL Models. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-5123-2_6
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DOI: https://doi.org/10.1007/978-1-4615-5123-2_6
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-7331-5
Online ISBN: 978-1-4615-5123-2
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