Skip to main content

Implementation Architectures and Applications of RS Codes

  • Chapter
Error-Control Coding for Data Networks

Part of the book series: The Springer International Series in Engineering and Computer Science ((SECS,volume 508))

  • 436 Accesses

Abstract

Some basic concepts of the RS codes and various encoding and decoding algorithms are discussed in Chapter 6. In this chapter, certain implementation architectures for RS codes are examined and compared. Also to further demonstrate the power of RS codes certain important applications of are introduced in this chapter.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Bibliography

  1. Sun HyperSparc technical specification, 1993.

    Google Scholar 

  2. W. B. Weeks, “Comparison of the Motorola DSP56000 and the Texas Instruments TMS320C25 digital signal processors for implementing a four error correcting (127,99) BCH error control code decoder”, IEEE Pacific Rim Conference on communications, computers, and signal processing, June 1st–2nd, pp.345–346, 1989.

    Google Scholar 

  3. M. D. Yucel, “Implementation of a real time Reed Solomon encoder and decoder using TMS32010”, IEEE Pacific Rim Conference on communications, computers, and signal processing, June lst–2nd, pp.341–344, 1989.

    Google Scholar 

  4. C. Parr, “Implementation of a re-programmable Reed Solomon decoder over GF(216) on a digital signal processor with external arithmetic unit”, Fourth Int’l European Space Agency Workshop on Digital Signal Processing Techniques Applied to Space Communication, London, Sept. 1994.

    Google Scholar 

  5. C. Caren, B. Benjamin, J. Boddie, and M. Fuccio, “A 60 ns CMOS DSP with On-Chip Instruction Cache”, 1987 ISSCC Digest of technical papers, pp. 156–157, Feb. 1987.

    Google Scholar 

  6. S.T.J. Fenn, N. Benaissa, and D. Taylor. “Rapid Prototyping of Reed-Solomon Codecs using Field Programmable Gate Arrays”. Proceedings of the 2nd International Conference on Concurrent Engineering and Electronic Design Automation, pp. 309–312, April 1994,

    Google Scholar 

  7. Viewlogic user manual

    Google Scholar 

  8. Xact manual, 1995.

    Google Scholar 

  9. Recommendation for Space Data System Standards: Telemetry Channel Coding, Issue 1, Washington, D.C., May 1984.

    Google Scholar 

  10. Consultative Committee for Space Data Systems, Blue Book CCSDS 101.0-B-2, Washington, D.C., NASA, 1987.

    Google Scholar 

  11. Consultative Committee for Space Data Systems, Blue Book CCSDS 101.0-B-3, Washington, D.C., NASA, 1992.

    Google Scholar 

  12. E. R. Berlekamp, “Bit serial Reed-Solomon encoder”, IEEE Trans. on Inform. Theory, Vol. IT-28, pp.869–874, 1982.

    Article  Google Scholar 

  13. M. Perman and J.-J. Lee, Reed-Solomon encoders — conventional vs. Berlekamp’s architecture, NASA JPL Publication 82-71, Nov. 1982.

    Google Scholar 

  14. I. S. Reed, L. J. Deutsch, I. S. Hsu, T. K. Truong, K. Wang, and C. S. Yeh, “The VLSI implementation of a Reed-Solomon encoder using Berlekamp’s bit-serial multiplier algorithm”, IEEE Trans. on Computers, Vol. C-33, No. 10, Oct. 1984.

    Google Scholar 

  15. L. B. Vries and K. Odaka, “CIRC---The Error-Correcting Code for the Compact Disk Digital Audio System,” Collected Papers AES Premiere Conference, Rye, New York, pp.178–188, New York: Audio Engineering Society, 1982.

    Google Scholar 

  16. K. A. S. Immink, “The digital versatile disc (DVD): system requirements and channel coding”, SMPTE Journal, pp. 483–489, August 1996.

    Google Scholar 

  17. H. M. Shao and I. S. Reed, “On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays”, IEEE Trans. on computers, vol. C-37, pp.1273–1280, 1988.

    Article  MathSciNet  Google Scholar 

  18. H. M. Shao, T. K. Truong, L. J. Deutsch, J. H. Yuen, and I. S. Reed, “A VLSI design of a pipeline Reed-Solomon decoder”, IEEE Trans. on computers, vol. C-34, pp.393–403, 1985.

    Article  MathSciNet  Google Scholar 

  19. H. B. Bakoglu, Circuit Interconnections and Packaging for VLSI, Reading, MA: Addison Wesley, 1987.

    Google Scholar 

  20. N. Weste and K. Eshragion, Principles of CMOS VLSI Design, Reading, MA: Addison Wesley, 1988.

    Google Scholar 

  21. Reed Solomon C Code Web Page, “http://www.hideki.iis.u-tokyo.ac.jp/robert/rs.c.

  22. Heather Bowers and Hui Zhang, “Comparison of Reed Solomon Codec Implementations” http://www.infopad.eecs.berkeley.edu/~hbowers/cs252/rs.html.

  23. S. Whitaker, K. Cameron, G. Maki, J. Canaris, and P. Owsley, “VLSI Reed-Solomon processor for the Hubble space telescope,” VLSI Signal Processing IV, Chapter. 35, IEEE Press, 1991.

    Google Scholar 

  24. S. Whitaker, J. Canaris, and K. Cameron, “Reed Solomon VLSI codec for advanced television”, IEEE Trans, on Circuits and Systems for Video Technology, vol.1, No.2, June 1991.

    Google Scholar 

  25. G. Maki, P. Owsley, K. Cameron, and J. Venbrux, “VLSI Reed-Solomon decoder design”, IEEE Military Communications Conf. Rec., pp.46.5.1–46.5.6, Oct. 1986.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 1999 Springer Science+Business Media New York

About this chapter

Cite this chapter

Reed, I.S., Chen, X. (1999). Implementation Architectures and Applications of RS Codes. In: Error-Control Coding for Data Networks. The Springer International Series in Engineering and Computer Science, vol 508. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-5005-1_7

Download citation

  • DOI: https://doi.org/10.1007/978-1-4615-5005-1_7

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-7273-8

  • Online ISBN: 978-1-4615-5005-1

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics