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T he problem of modeling, verifying and automatically synthesizing realtime signal processing systems is the context where this book is situated. The main focus is on the real-time aspect of these systems, and the resulting support of functional timing aspects and real-time constraints in the proposed model, the timing verification and the task-level system synthesis methodology. Emphasis in the synthesis methodology was put on dealing with the task-level concurrency, and the required task-level scheduling. This problem is crucial for complex real-time embedded systems and is encountered in both hardware design and embedded software design. Although originally targeted towards real-time embedded software (and presented here as well in this context), our modeling and synthesis approach is applicable to and re-usable for the custom hardware as well, making it a truly system-level model and approach.
KeywordsExecution Model Sporadic Task Schedulability Test Timing Verification Synthesis Methodology
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