Abstract
There are multiple opportunities for future research in high performance synchronous circuit optimization based on non-zero clock skew scheduling. Possible future research efforts are subdivided within this chapter into two categories that are discussed below. Improvements to the circuit model and algorithms are offered in Section 10.1. Clock tree synthesis to optimally satisfy a non-zero clock skew schedule is presented in Section 10.2.
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Notes
Note that not all of the vertices correspond to registers.
The deviation ∈ is due to parameter variations developed during circuit manufacturing as well as to environmental conditions developed during operation of the circuit.
Or any large circuit and/or wire networks in general.
Including the routing of signals within the clock distribution network.
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© 2000 Springer Science+Business Media New York
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Kourtev, I.S., Friedman, E.G. (2000). Future Directions. In: Timing Optimization Through Clock Skew Scheduling. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-4411-1_10
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DOI: https://doi.org/10.1007/978-1-4615-4411-1_10
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-6985-1
Online ISBN: 978-1-4615-4411-1
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