Abstract
Timing constraints can be used to represent interfaces with external processes or local constraints between pairs or groups of code operations. Five categories of timing constraints are analyzed below. We will assume timing constraints are given in terms of the clock period. Otherwise we can convert using the following: we use for minimum timing constraints and for maximum timing constraints, where t c is the period of the clock (equal to one cstep) and t is the real time constraint given by the specification. We will investigate the following types of timing constraints for architectural synthesis:
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Fixed Timing
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Minimum Timing
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Maximum Timing
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Unknown Timing
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Special Timing Constraints
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© 1992 Springer Science+Business Media New York
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Gebotys, C.H., Elmasry, M.I. (1992). Interface Constraints. In: Optimal VLSI Architectural Synthesis. The Kluwer International Series in Engineering and Computer Science, vol 158. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-4018-2_9
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DOI: https://doi.org/10.1007/978-1-4615-4018-2_9
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-6797-0
Online ISBN: 978-1-4615-4018-2
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