Abstract
Thus far in this book, self-timed circuits for synchronization of a digital system have been emphasized. This is an anisochronous technique, in which the operations in the digital system are ordered according to the completion of previous operations rather than being slaved to a clock. This is a promising approach for future scaled integrated circuit technologies, where interconnect delays tend to become large relative to circuit speeds, because the correct operation can be made delay independent. However, self-timed circuits are not the only way to achieve delay independence. In this chapter we consider a class of isochronous interconnect approaches, which include the synchronous design commonly used in the past as a special case [1,2]. These include, in addition to synchronous interconnect, mesochronous, pleisochronous, and heterochronous approaches. All these techniques are suggested by similar approaches that have long found application in digital communication, a domain where interconnect delays are routinely equal to many clock cycles [3].
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© 1991 Springer Science+Business Media New York
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Messerschmitt, D.G. (1991). Isochronous Interconnect. In: Synchronization Design for Digital Systems. The Kluwer International Series in Engineering and Computer Science, vol 123. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3990-2_6
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DOI: https://doi.org/10.1007/978-1-4615-3990-2_6
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