Abstract
Designing a self-timed programmable processor is a challenging task because of its complexity. Despite the difficulties, self-timed programmable processors have recently drawn some attention from computer architecture designers [1,2,3]. The debate over which design discipline provides the most cost-effective system has not been resolved in four decades, and is technology-dependent. However, the interest in designing fully self-timed processors stems from a very different motivation. We like to experiment with the average speed exhibited by a self-timed programmable processor, since a moderate speed-up (two to five times faster) would have tremendous impact on how high performance digital systems will be implemented in the future.
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© 1991 Springer Science+Business Media New York
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Meng, T.H. (1991). Self-Timed Programmable Processors. In: Synchronization Design for Digital Systems. The Kluwer International Series in Engineering and Computer Science, vol 123. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3990-2_4
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DOI: https://doi.org/10.1007/978-1-4615-3990-2_4
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