Abstract
The issues in designing computing machines, both in hardware and in software, have always shifted in response ti the evolution in technology. VLSI promises great processing power at low cost, but there are also new contraints that potentially prevent us from taking advantage of technology advances. The increase in processing power is a direct consequence of scaling the digital IC process, but as this scaling continues, it is doubtful that the benefits of faster devices can be fully exploited due to other fundamental limitations. It is already becoming clear that the system clock speeds are starting to lag behind logic speeds in recent chip designs. While gate delays are well below 1 nanosecond in advanced CMOS technology, clock rates of more than 50 Mhz are difficult to obtain and where they have been attained require extensive design and stimulation effort. This problem will get worse in the future as we integrate more devices on a chip and the speed of logic increase futher
“We might say that the clock enables us to introduce a discreteness into time, so that time for some purposes can be regardede as a succession of intstants intead of a continuous flow. A digital machines must essentially deal with dicrete objects, and in the case of the ACE [automatic computing engine] that is made possible by the use of clock. All other digital computing machines except for human and other brains that I know of do the same. One can think up ways of avoiding it, but they are very awkward.” Alan Turing, 1947 Lecture to the London Mathematical Society
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Meng, T.H. (1991). Introduction. In: Synchronization Design for Digital Systems. The Kluwer International Series in Engineering and Computer Science, vol 123. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3990-2_1
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DOI: https://doi.org/10.1007/978-1-4615-3990-2_1
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