Abstract
High-level specifications of digital circuits consist of two major components: the internal computations that the circuit must perform and the external signalling the circuit must use to communicate with its environment. The first of these components has received the overwhelming majority of the attention in high-level synthesis research. Much progress has been made and tools are now available that can translate an internal or data-flow specification into a register-transfer level implementation. By contrast, the interface component has received very limited attention even though it is crucial to integrating the circuit into an environment that will put it to use.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
Bibliography
T. Amon, G. Borriello, C. Sequin. Operation/Event Graphs: A Design Representation for Timing Behavior. Proceedings of the 10th IFIP International Conference on Computer Hardware Description Languages (CHDL’91), April 1991.
T. Amon, G. Borriello. OEsim: A Simulator for Timing Behavior. Proceedings of the 28th ACM/IEEE Design Automation Conference (DAC’ 91), June 1991.
T. Amon, G. Borriello, Sizing Synchronization Queues: A Case Study in Higher Level Synthesis, Proceedings of the 28th ACM/IEEE Design Automation Conference (DAC’91), June 1991.
L. Augustin. Timing Models in VAL/VHDL. Proceedings of the IEEE International Conference on Computer-Aided Design (ICCAD’89), November 1989.
L. Augustin, D. Luckham, et. al.. Hardware Design and Simulation in VAL/VHDL. Kluwer Academic Publishers, 1991.
G. Borriello, R. Katz. Synthesizing Transducers from Interface Specifications. Proceedings of the IFIP International Conference on Very Large Scale Integration (VLSI’87) North-Holland, August 1987.
G. Bordello, R. Katz. Synthesis and Optimization of Interface Transducer Logic. Proceedings of the IEEE International Conference on Computer-Aided Design (ICCAD’87), November 1987.
G. Borriello,A New Interface Specification Methodology and its Application to Transducer Synthesis. Technical Report UCB/CSD 88/430 (PhD Dissertation), Computer Science Division, University of California at Berkeley, May 1988.
G. Borriello. Combining Event and Data-Flow Graphs in Behavioral Synthesis. Proceedings of the IEEE International Conference on Computer-Aided Design (ICCAD’88), November 1988.
G. Borriello. Synthesis of Asynchronous/Synchronous Control Logic. Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS’89),May 1989.
J. Burns, A. Newton. SPARCS: A New Constraint-Based IC Symbolic Layout Spacer. Proceedings of the IEEE Custom Integrated Circuits Conference,1986.
T. Chu. On the Models for Designing VLSI Asynchronous Digital Systems. Integration, The VLSI Journal, Vol. 4, August 1986.
S. Hayati and A. Parker. Automatic Production of Controller Specifications from Control and Timing Behavioral Descriptions, Proceedings of the 26th ACM/IEEE Design Automation Conference (DAC’89), June 1989.
M. McFarland, A. Parker, R. Camposano. The High-Level Synthesis of Digital Systems. Proceedings of the IEEE, 78(2):319–335, February 1990.
T. Meng, R. Brodersen, and D. Messerschmitt. Automatic Synthesis of Asynchronous Circuits from High Level Specifications. IEEE Transactions on Computer-Aided Design of Circuits and Systems, 8(11):1185–1205, November 1989.
J. Nestor, D. Thomas. Behavioral Synthesis with Interfaces. Proceedings of the IEEE International Conference on Computer-Aided Design (ICCAD’86), November 1986.
J. Nestor. Specification and Synthesis of Digital Systems with Interfaces, Technical Report CMUCAD-87–10 (PhD Dissertation), Dep’t of Electrical and Computer Engineering, Carnegie-Mellon University, April 1987.
A. Parker, J. Wallace. SLIDE: An I/O Hardware Descriptive Language. IEEE Transactions on Computers, 30(6):423–439, June 1981.
M. Shandad, et. al.. VHSIC Hardware Description Language. IEEE Computer, 18(2):94–103, February 1985.
D. Thomas, P. Moorby. The Verilog Hardware Description Language. Kluwer Academic Publishers, 1991.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1991 Springer Science+Business Media New York
About this chapter
Cite this chapter
Borriello, G. (1991). Specification and Synthesis of Interface Logic. In: Camposano, R., Wolf, W. (eds) High-Level VLSI Synthesis. The Springer International Series in Engineering and Computer Science, vol 136. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3966-7_7
Download citation
DOI: https://doi.org/10.1007/978-1-4615-3966-7_7
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-6771-0
Online ISBN: 978-1-4615-3966-7
eBook Packages: Springer Book Archive