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Reduced-Instruction-Set, Writable-Instruction-Set and Very-Long-Instruction-Word Computers

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Abstract

Instruction sets and their addressing modes and functional classes may grow to be quite complicated. For example, the widely used minicomputer VAX 11/780 has 16 addressing modes and more than 300 unique instructions! Even microprocessors often have complicated instruction sets. The Motorola 68020 recognizes seven data types, employs 18 addressing modes, and uses instruction formats that may vary in length from 1 16-bit word up to 11 16-bit words.

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Notes

  1. Cray Research, CRAY-1 Optimization Guide

    Google Scholar 

  2. John L. Hennessy et al., “The MIPS Machine,” COMPCON,

    Google Scholar 

  3. I.E.E.E. (Spring 1982)

    Google Scholar 

  4. Anant Agarwal et al., “On-chip Instruction Caches for High Performance Processors,” Proceedings, Stanford Conference on Advanced Research in VLSI (March 1987)

    Google Scholar 

  5. John L. Hennessy et al., “Hardware/Software Tradeoffs for Increased Performance,” Proceedings, SIGARCH/SIGPLAN (Palto Alto: March 1982)

    Google Scholar 

  6. Robert Colwell el al., “Instructions Sets and Beyond: Computers, Complexity, and Controversy,” Computer (September 1985)

    Google Scholar 

  7. H. Azaria and D. Tabak, “The MODHEL Microcomputer for RISCs Study,” Microprocessing and Microprogramming, 12, Nos. 3–4 (October–November 1983)

    Google Scholar 

  8. D. A. Patterson and C. H. Sequin, “A VLSI RISC,” Computer, 15, No. 9 (September 1982)

    Google Scholar 

  9. M. Hopkins, “Definition of RISC,” Proceedings of the Conference on High Level Language Architecture (Los Angeles, CA: May 1984)

    Google Scholar 

  10. Am29000 32-bit Streamlined Instruction Processor, Advanced Micro Devices (Sunnyvale, CA: 1988)

    Google Scholar 

  11. R. Jenkins and R. Moore, “Computer Architecture,” (Baltimore, MD: The Johns Hopkins University Whiting School of Engineering)

    Google Scholar 

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© 1991 Springer Science+Business Media New York

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Veronis, A.M. (1991). Reduced-Instruction-Set, Writable-Instruction-Set and Very-Long-Instruction-Word Computers. In: Survey of Advanced Microprocessors. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3930-8_3

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  • DOI: https://doi.org/10.1007/978-1-4615-3930-8_3

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6753-6

  • Online ISBN: 978-1-4615-3930-8

  • eBook Packages: Springer Book Archive

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