Abstract
In contrast to message-based systems, shared memory multiprocessors allow for (both time and space) efficient data sharing, and thus are more suitable for execution models that exploit medium grain parallelism. Automatic and efficient management of the limited globally shared address space allows larger programs to run in shorter time. In this paper, we propose a hybrid heap-stack mechanism, called ELPS (Explicitly Linked Paging Stack), for dynamic allocation and deallocation of space. ELPS allows the space of each parallel task to expand and contract dynamically, resulting in much more efficient sharing of space than static partitioning. The distributed link storage scheme allows a higher degree of scalability than the centralized table approach.
ELPS can be implemented with or without hardware support. It has been used to manage the memory space for parallel execution of Prolog. Simulation results show that our current implementation of ELPS incurs an average of 2% overhead (11% without hardware support), while satisfying the memory requirement of parallel execution to keep pace with the potential speedup.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
P. Borgwardt. Parallel prolog using stack segments on shared-memory multiprocessors. In Proceedings of the 1984 International Symposium on Logic Programming, Atlantic City, NJ, Feb. 1984.
B.S. Fagin and A.M. Despain. Performance studies of a parallel prolog architecture. In 14th International Symposium on Computer Architecture, June 1987.
M. Hermenegildo. An abstract machine for restricted and-parallel execution of logic programs. In Proceedings of the 3rd International Conference on Logic Programming, London, 1986.
Y.-J. Lin. A Parallel Implementation of Logic Programs. PhD thesis, University of Texas, Austin, August 1988. Technical Report AI88-84.
J.W. Lloyd. Foundations of Logic Programming. Springer-Verlag, 2nd edition, 1987.
E. Lusk, R. Butler, T. Disz, R. Olson, R. Overbeek, R. Stevens, D.H.D. Warren, A. Calderwood, P. Szeredi, S. Haridi, P. Brand, M. Carlsson, A. Ciepielewski, and B. Hausman. The aurora or-parallel prolog system. In Proceedings of the Int’l Conference on 5th Generation Computer Systems, Tokyo, Japan, November 1988.
V.P. Srini, J. Tam, T. Nguyen, B. Holmer, Y. Patt, and A. Despain. Design and implementation of a CMOS chip for prolog. Technical Report UCB/CSD 88/412, CS Division, UC Berkeley, March 1988.
H. Touati and T. Hama. A light-weight prolog garbage collector. In International Conference on Fifth Generation Computer Systems 1988 (FGCS’88), Tokyo, Japan, 1988.
D.H.D. Warren. An abstract prolog instruction set. Technical report, SRI International, Menlo Park, CA, 1983.
D.H.D. Warren. The sri model for or-parallel execution of prolog—abstract design and implementation issues. In Proceedings of the 1987 IEEE Symposium on Logic Programming, pages 92–102, San Francisco, September 1987.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1992 Springer Science+Business Media New York
About this chapter
Cite this chapter
Nguyen, T.M., Srini, V.P. (1992). A Dynamic Memory Management Scheme for Shared Memory Multiprocessors. In: Dubois, M., Thakkar, S. (eds) Scalable Shared Memory Multiprocessors. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3604-8_17
Download citation
DOI: https://doi.org/10.1007/978-1-4615-3604-8_17
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-6601-0
Online ISBN: 978-1-4615-3604-8
eBook Packages: Springer Book Archive