Abstract
Some VHDL language constructs have a bracket structure delimited by opening and closing markers composed of reserved words. For example, the if statement is delimited by the reserve words if and end if.
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© 1993 Springer Science+Business Media New York
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Bergé, JM., Fonkoua, A., Maginot, S., Rouillard, J. (1993). Bracketing: Syntax Consistency. In: VHDL’92. The Springer International Series in Engineering and Computer Science, vol 229. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3246-0_29
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DOI: https://doi.org/10.1007/978-1-4615-3246-0_29
Publisher Name: Springer, Boston, MA
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Online ISBN: 978-1-4615-3246-0
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