Abstract
Advances in silicon semiconductor processing and manufacturing technologies are allowing submicrometer scaling of semiconductor features, increasing both the transistor density and switching speed. The need to interconnect ever increasing numbers of transistors on the semiconductor chip has led to significant research and development in thin film multilayer technology. Current semiconductor chips may contain as many as four layers of metal interconnect. The issues addressed in the development of chip level multilayer interconnections include process compatibility, planarization, step coverage, build-in stress, and reliability [1]-[2]. Aluminum and aluminum alloys are used for interconnection metallization. A variety of glasses deposited by chemical vapor deposition (CVD) and spin-on techniques, and polyimides have been used as interlayer dielectrics. Complex processes have been developed to address planarization and step coverage issues.
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Johnson, R.W. (1993). Silicon-Based Multichip Modules. In: Doane, D.A., Franzon, P.D. (eds) Multichip Module Technologies and Alternatives: The Basics. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3100-5_16
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DOI: https://doi.org/10.1007/978-1-4615-3100-5_16
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