A CMOS Time to Digital Converter with Analog Memory for High Energy Physics Particle Detectors
A data driven TDC (Time to Digital Converter) has been designed and fabricated in HP’s 1.2 μm nwell CMOS process. The circuit was designed to work with the straw tube electronics of the Superconducting Supercollider (SSC), where we wish to measure the arrival time of electrons at a sense wire. The TCCAMU (Time to Charge Converter with an Analog Memory Unit) measures the time between an edge of the system clock and the leading edge of an asynchronous signal, and then gives a digital output representing that time measurement. Analog data sparsification occurs before the digitization with the help of an analog Level 1 / Level 2 storage system; Level 1 to Level 2 data transfers are virtual, in the sense that one swaps capacitor addresses instead of moving charge.
Two separate fabrication runs resulted in chips that have ∼108 ps / LSB resolution for any particular storage location. The measurement range is 8 - 24 ns, but adding digital logic to count the reference clock will extend the range to ∼ 1 second.
KeywordsDigital Output Storage Capacitor Reference Clock Analog Memory Digital Logic
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