Non-Stack Single-Pass Simulation
The previous chapter dealt with stack-based single-pass simulation. Stack-based single-pass simulation permits the simulation of a range of cache configurations in a time and space efficient manner. All stack-based simulation algorithms maintain multiple caches in a stack, exploiting inclusion properties between caches. During simulation they do a sequential search down the stack examining, modifying and moving entries as appropriate. Stack-based single-pass simulation is elegant and efficient relative to performing the simulations one at a time. However, taking a step back we see that the essential idea exploited in stack-based single-pass simulation is one of reducing simulation effort by simulating multiple configurations together and exploiting relations between the configurations to reduce simulation effort. This idea may be exploited to develop efficient single-pass algorithms in situations where stack simulation is not applicable. Even in situations where stack simulation is applicable non-stack single-pass simulation algorithms can be more efficient by avoiding the sequential search of the stack. In this chapter we discuss single-pass simulation algorithms that are not stack-based.
KeywordsProduction Line Subsys
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- G. M. Adeĺson-Veĺskii and E. M. Landis. An algorithm for the organization of information. Soviet Math. Doklady, 3:1259–1263, 1962.Google Scholar
- B. T. Bennett and V. J. Kruskal. LRU stack processing. IBM J. of Research and Development, pages 353–357, July 1975.Google Scholar
- M. D. Hill. Man page of tycho.Google Scholar
- F. Olken. Efficient methods for calculating the success function of fixed space replacement policies. Technical Report LBL-12370, Lawrence Berkeley Laboratory, 1981.Google Scholar
- T. R. Puzak. Analysis of Cache Replacement Algorithms. PhD thesis, University of Massachusetts, Amherst, 1985.Google Scholar
- R. A. Sugumar. Multi-Configuration Simulation Algorithms for the Evaluation of Computer Architecture Designs. PhD thesis, University of Michigan, 1993. Also available as Tech. Report CSE-TR-173-93, CSE Division, University of Michigan.Google Scholar
- R. A. Sugumar and S. G. Abraham. Efficient simulation of caches under optimal replacement with applications to miss characterization. In Proc. ACM SIGMETRICS Conf., pages 24–35, 1993.Google Scholar
- R. A. Sugumar and S. G. Abraham. Fast efficient simulation of write-buffer configurations. In Hawaii Intl. Conf. on Systems Sciences — Architecture Track, 1994.Google Scholar
- R. A. Sugumar and S. G. Abraham. Set-associative cache simulation using generalized binomial trees. ACM Trans. on Computer Systems, 1995? Conditionally accepted pending minor revisions.Google Scholar
- R. Suri. Perturbation analysis: The state of the art and research issues explained via the GI/G/1 queue. Proceedings of the IEEE, 77(1), jan 1989.Google Scholar
- J. G. Thompson. Efficient analysis of Caching Systems. PhD thesis, University of California, Berkeley, 1987.Google Scholar
- I. L. Traiger and D. R. Slutz. One pass techniques for the evaluation of memory hierarchies. Technical Report RJ 892, IBM, 1971.Google Scholar