Abstract
After the circuit partitioning phase, the area occupied by each block (sub-circuit) can be calculated and the number of terminals (pins) required by each block is known. In addition, the netlist specifying the connections between the blocks is also available. In order to complete the layout, we need to arrange the blocks on the layout surface and interconnect their pins according to the netlist. The arrangement of blocks is done in the placement phase, while inter-connection is completed in the routing phase. In the placement phase, blocks are assigned a specific shape and are positioned on a layout surface, in a such a fashion that no two blocks are overlapping and enough space is left on the layout surface to complete the interconnections. The blocks are positioned so as to minimize the total area of the layout. In addition, the locations of pins on each block are also determined.
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© 1995 Springer Science+Business Media New York
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Sherwani, N. (1995). Placement, Floorplanning and Pin Assignment. In: Algorithms for VLSI Physical Design Automation. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2351-2_5
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DOI: https://doi.org/10.1007/978-1-4615-2351-2_5
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-5997-5
Online ISBN: 978-1-4615-2351-2
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