Abstract
As process and device technologies mature, hundreds of thousands and even millions of transistors are integrated on a single silicon chip. Computer-aided design tools are indispensable for designing such state-of-the-art VLSI chips. The tools for complex integrated circuit design should be different from those for small scale integrated circuit design, for which a small set of tools is adequate. For the verification of small scale integrated circuits, circuit simulators, such as SPICE2 1, are enough. In other words, exhaustive verification of a circuit of such size can be performed at the transistor level in a reasonable CPU time using SPICE2. SPICE2 was originally designed in the early 1970s to analyze circuits containing fewer than a hundred transistors. Unfortunately, SPICE3, the latest version of SPICE, is still inadequate for very large circuits.
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© 1995 Springer Science+Business Media New York
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Kong, JT., Overhauser, D. (1995). Introduction. In: Digital Timing Macromodeling for VLSI Design Verification. The Springer International Series in Engineering and Computer Science, vol 319. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2321-5_1
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DOI: https://doi.org/10.1007/978-1-4615-2321-5_1
Publisher Name: Springer, Boston, MA
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