Skip to main content

Abstract

One of the available methodologies to simulate substrate coupling is a semiconductor device simulator such as TMA MEDICI [3.2] or MEDUSA [3.4] which employs numerical techniques to analyze semiconductor device action. In this chapter we discuss an overview of such an approach, its significance and its attributes [3.1].

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. W.L. Engl, H.K. Dirks, B. Meinerzhagen, “Device Modeling,” Proceedings of the IEEE, Vol. 71, No. 1, Jan. 1983.

    Google Scholar 

  2. TMA MEDICI: Tivo Dimensional Device Simulation Program, Version 1, Volume 1, Technology Modeling Associates, Inc., 1992.

    Google Scholar 

  3. J.B. Johnson, The Voronoi Cell Method for Two and Three Dimensional Semiconductor Device Simulation, Ph.D dissertation, Carnegie Mellon University, 1987.

    Google Scholar 

  4. W.L. Engl, R. Laur and H.K. Dirks, “MEDUSA- A Simulator for Modular Circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits, Vol. CAD-1, pp. 85–93, 1982.

    Article  Google Scholar 

  5. O. Madelung, Introduction to Solid-State Theory, Berlin: Springer, 1978.

    Book  Google Scholar 

  6. C.R. Crowell and S.M. Sze, “Current transport in metal-semiconductor barriers,” Solid State Electronics, vol. 9, pp. 1035, 1966.

    Article  Google Scholar 

  7. D. M. Caughey and R.E. Thomas, “ Carrier mobilities in silicon empirically related to doping and field,” Proceedings of the IEEE, vol. 55, pp. 2192–2193, 1967.

    Article  Google Scholar 

  8. S. Selberherr, “Process and device modeling for VLSI,” Microelectronics Reliability, vol. 24, no. 2, pp. 225–257, 1984.

    Article  MathSciNet  Google Scholar 

  9. S. M. Sze, Physics of Semiconductor Devices, 2nd ed., John Wiley and Sons, New York, 1981.

    Google Scholar 

  10. Zhiping Yu and R.W. Dutton, SEDAN III - A Generalized Electron Material Device Analysis Program, Stanford Electronics Laboratory Technical Report, Stanford University, July 1985.

    Google Scholar 

  11. F. Dannhauser, “Die Abhangigkeit der Tragerbeweglichkeit in Silizium von der Konzentration der freien Ladungstrager-I,” Solid-State Electronics, vol. 15, pp. 1371–1375, 1972.

    Article  Google Scholar 

  12. J. Krausse, “Die Abhangigkeit der Tragergeweglichkeit in Silizium von der Konzentration der freien Ladungstrager- II,” Solid-State Electronics, vol. 15, pp. 1377–1381, 1972.

    Article  Google Scholar 

  13. W. Anheier and W.L. Engl, “Numerical analysis of gate triggered SCR turn-on transients,” in Technical Digest of the IEEE International Electron Devices Meeting, pp. 303A–303D, 1977.

    Google Scholar 

  14. K. K. Thornber, “Relation of drift velocity to low-field mobility and high-field saturation velocity,” Journal of Applied Physics, vol. 51, no. 4, pp. 594–602, 1970.

    Google Scholar 

  15. K. Yamaguchi, “Field-dependent mobility model for two-dimensional numerical analysis of MOSFETs,” IEEE Transactions on Electron Devices, vol. ED-26, pp. 1068–1074, 1979.

    Article  Google Scholar 

  16. J. Cooper and D.F. Nelson, “Measurement of the high-field velocity of electrons in inversion layers on silicon,” IEEE Electron Devices Letters, vol. EDL-2, pp. 171–173, 1981.

    Article  Google Scholar 

  17. A.H. Marshak and K.M. van Vliet, “Electric current in solids with position-dependent band structure,” Solid-State Electronics, vol. 21, pp. 417–427, 1978.

    Article  Google Scholar 

  18. A.H. Marshak and K.M. van Vliet, “Carrier densities and emitter efficiency in degenerate materials with position-dependent band structure,” Solid-State Electronics, vol. 21, pp. 429–434, 1978.

    Article  Google Scholar 

  19. J.W. Slotboom and H.C. De Graaff, “Measurements of bandgap narrowing in Si bipolar transistors,” Solid-State Electronics, vol. 19, pp. 857–862, 1976.

    Article  Google Scholar 

  20. A.W. Wieder, “Emitter effects in shallow bipolar devices: Measurements and consequences,” IEEE Transactions on Electron Devices, vol. ED-27, pp. 1402–1408, 1980.

    Google Scholar 

  21. R.P. Mertens, J.L. van Meerbergen, J.F. Nijs, and R.T. van Overstraeten, “Measurement of the minority-carrier transport parameters in heavily doped silicon,” IEEE Transactions on Electron Devices, vol. ED-27, no. 5, 1980.

    Google Scholar 

  22. A. Selloni and S.T. Pantelides, Phys. Rev. Lett., Oct.12 15, 1982.

    Google Scholar 

  23. D.L. Scharfetter, “Measured dependence of lifetime upon defect density and temperature in depletion layers of epitaxial silicon diodes,” presented at the Solid-State Devices Res. Conference, Santa Barbara, CA, 1967.

    Google Scholar 

  24. J.G. Fossum and D.S. Lee, “A physical model for the dependence of carrier lifetime on doping density in nondegenerate silicon,” Soid-State Electronics, vol. 25, no. 8, pp. 741–747, 1982.

    Article  Google Scholar 

  25. J. Dziewor and W. Schmid, “Auger coefficients for highly doped and highly excited silicon,” Applied Physics Letters, vol. 31, pp. 346–348, 1977.

    Article  Google Scholar 

  26. J.O. Beck and R. Conradt, “Auger recombination in silicon,” Solid-State Communications, vol. 13, pp. 93–95, 1973.

    Article  Google Scholar 

  27. A.S. Grove, Physics and Technology of Semiconductor Devices, John Wiley and Sons, New York, 1967.

    Google Scholar 

  28. G. Strang and G.J. Fix, An Analysis of the Finite Element Method, Englewood Cliffs, NJ: Prentice-Hall, 1973.

    Google Scholar 

  29. R.S. Varga, Matrix Iterative Analysis, Englewood Cliffs, NJ: Prentice-Hall, 1962.

    Google Scholar 

  30. J.A. Greenfield and R.W. Dutton, “Nonplanar VLSI device analysis using the solution of Poisson’s equation,” IEEE Transactions on Electron Devices, vol. ED-27, pp. 1520–1532, 1980.

    Article  Google Scholar 

  31. R.H. Mac Neal, “An asymmetrical finite difference network,” Quart. Appl. Math., vol. 11, pp. 295–310, 1953.

    MathSciNet  Google Scholar 

  32. E.M. Buturla, P.E. Cottrel, B.M. Grossman, and K.A. Salsburg, “Finite-element analysis of semiconductor devices: The Fielday program,” IBM Journal of Research and Development, vol. 25, pp. 218–231, 1981.

    Article  Google Scholar 

  33. D.L. Scharfetter and H.K. Gummel, “Large-Signal Analysis of a Silicon Read Diode Oscillator IEEE Transactions on Electron Devices, vol. 16, no. 1, pp. 64–77, 1969.

    Article  Google Scholar 

  34. W.L. Engl and H. Dirks, “Numerical Device Simulation Guided by Physical Approaches,” in Numerical Analysis of Semiconductor Devices, B.T. Browne and J.J.H. Miller, Eds., Dublin, Ireland: Boole Press, 1979.

    Google Scholar 

  35. M.S. Mock, “Time-dependent simulation of coupled devices,” in Numerical Analysis of Semiconductor Devices and Integrated Circuits, B.T. Browne and J.J.H. Miller, Eds., Dublin, Ireland: Boole Press, 1981.

    Google Scholar 

  36. M.S. Mock, “Time discretisation of a nonlinear initial value problem,” Journal of Computational Physics, vol. 21, pp. 20–37, 1976.

    Article  MathSciNet  MATH  Google Scholar 

  37. A. De Mari, “An accurate numerical one-dimensional solution of the p-n junction under arbitrary transient conditions,” Solid-State Electronics, vol. 11, pp. 1021–1053, 1968.

    Article  Google Scholar 

  38. G.D. Hachtel, R.C. Joy, and J.W. Cooley, “A new efficient one-dimensional analysis program for junction device modeling,” Proceedings of the IEEE, vol. 60, pp. 86–98, 1972.

    Article  Google Scholar 

  39. O. Manck and W.L. Engl, “Two dimensional computer simulation for switching a bipolar transistor out of saturation,” IEEE Transactions on Electron Devices, vol. ED-22, pp. 339–347, 1975.

    Article  Google Scholar 

  40. G.D. Hachtel, M.H. Mack, R.R. O’Brien and B. Speelpenning, “Semiconductor analysis using finite elements-Part I: Computational aspects,” IBM Journal of Research and Development, vol. 25, pp. 232–245, 1981.

    Article  Google Scholar 

  41. H.P. Strohband, “New results on stability of the BDG-integration method with non-constant stepsize and order,” in Asilomar Conference on Circuits, Systems and Computers, Conference Records, pp. 354–358, 1975.

    Google Scholar 

  42. R.K. Brayton, F.G. Gustayson, and G.D. Hachtel, “A new efficient algorithm for solving differential-algebraic systems using implicit backward differnetiation formulas” Proceedings of the IEEE, vol. 60, pp. 98–108, 1975.

    Article  Google Scholar 

  43. R. Laur and J.P. Strohband, “Numerical modeling technique for computer-aided circuit design,” in Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 247–250, 1976.

    Google Scholar 

  44. W.L. Engl and H. Dirks, “Functional device simulation by merging numerical building blocks,” in Numerical Analysis of Semiconductor Devices adn Integrated Circuits, B.T. Browne and J.J.H. Miller, Eds: Dublin, Ireland: Boole Press, 1981.

    Google Scholar 

  45. H.K. Gummel, “A self-consistent iterative scheme for one-dimensional steady-state transistor calculations,” IEEE Transactions on Electron Devices, vol. ED-11, pp. 455–465, 1964.

    Article  Google Scholar 

  46. O. Manck, H.H. Heimeier, and W.L. Engl, “High injection in a two-dimensional transistor,” IEEE Transactions on Electron Devices, vol. ED-21, pp. 403–409, 1974.

    Article  Google Scholar 

  47. E.M. Buturla and P.E. Cotrell, “Simulation of semiconductor transport using coupled and decoupled solution techniques,” Solid-State Electronics, vol. 23, pp. 331–334, 1980.

    Article  Google Scholar 

  48. W.L. Engl, O. Manck and A.W. Wieder, “Modeling of bipolar devices,” in Process and Device Modeling for Integrated Circuits, E van de Wiele, W.L. Engl and P.G. Jespers, Eds., Leyden, The Netherlands: Noordhoff Int. Publ., pp. 377–418, 1977.

    Google Scholar 

  49. J.D. Arcy, E.J. Prendergast and P. Loyd, “Modeling of bipolar device structures- Physical simulations,” Technical Dogest of the International Electron Device Meeting, pp. 516–519, 1981.

    Google Scholar 

  50. T. Adachi, A. Yishii, and T. Sudo, “Two-dimensional semiconductor analysis using finite-element method,” IEEE Transactions on Electron Devices, vol. ED-26, pp. 1026–1031, 1979.

    Article  Google Scholar 

  51. H.H. Heimeier, “A two dimensional numerical analysis of a silicon n-p-n transistor,” IEEE Transactions on Electron Devices, vol. ED-20, pp. 708–714, 1969.

    Google Scholar 

  52. S. Selberherr, A. Schutz, and H.W. Potzl, “Minimos- A two dimensional MOS transistor analyzer,” IEEE Transactions on Electron Devices, vol. ED-27, pp. 1540–1549, 1980.

    Article  Google Scholar 

  53. J.W. Slotboom, “Computer-aided two dimensional analysis of bipolar transistors,” IEEE Transactions on Electron Devices, vol. ED-20, pp. 669–679, 1973.

    Article  Google Scholar 

  54. D. Vandorpe, J. Borel, G. Merckel, and P. Saintot, “An accurate two-dimensional numerical analysis of the MOS transistor,” Solid-State Electronics, vol. 15, p. 547, 1972.

    Article  Google Scholar 

  55. A. Yoshii, S. Horiguchi, M. Tomizawa, H. Kitazawa, and T. Sudo, “Three-dimensional analysis for semiconductor devices,” Japan Inst. Electron. Comm. Enggineers Tech. Rep. SSD-80–15, pp.55–62, 1980 (in Japanese).

    Google Scholar 

  56. T. Wada and R.L.M. Dang, “Modification of ICCG method for application to semiconductor device simulators,” Electronics Letters, vol. 18, pp. 256–266, 1982.

    Google Scholar 

  57. The Stanford BiCMOS Project Annual Report, Center for Integrated Systems, Stanford Univeristy, pp. 7–24, 1990.

    Google Scholar 

  58. S. Masui, “Simulation of Substrate Coupling in Mixed-Signal MOS Circuits,” Technical Digest of the VLSI Circuits Symposium, pp. 42–43, June 1992.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 1995 Springer Science+Business Media New York

About this chapter

Cite this chapter

Verghese, N.K., Schmerbeck, T.J., Allstot, D.J. (1995). Semiconductor Device Simulation. In: Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits. The Springer International Series in Engineering and Computer Science, vol 302. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2239-3_3

Download citation

  • DOI: https://doi.org/10.1007/978-1-4615-2239-3_3

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-5942-5

  • Online ISBN: 978-1-4615-2239-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics