Abstract
Binary Decision Diagrams (BDDs) are a powerful tool and are frequently used in many applications in VLSI CAD, such as logic synthesis and verification. However, these data structures are very sensitive to variable ordering and their resulting size often becomes intractable for practical implementation. Several techniques for variable (re-)ordering have been proposed. (For an overview see [43])
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© 2001 Springer Science+Business Media New York
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Thornton, M.A., Drechsler, R., Miller, D.M. (2001). BDD Minimization. In: Spectral Techniques in VLSI CAD. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-1425-1_6
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DOI: https://doi.org/10.1007/978-1-4615-1425-1_6
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-5547-2
Online ISBN: 978-1-4615-1425-1
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