Abstract
The logic and routing resources in an FPGA are limited. The logic capacity is determined by the number of logic blocks and the interconnect capacity is determined by the interconnect architecture. It is not possible to implement a function on a given array if the gate count required for the function exceeds the logic capacity of the array, or if the required connections cannot be completely supported by the available routing resources.
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© 2001 Springer Science+Business Media New York
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George, V., Rabaey, J.M. (2001). Exploration Environment. In: Low-Energy FPGAs — Architecture and Design. The Springer International Series in Engineering and Computer Science, vol 625. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-1421-3_3
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DOI: https://doi.org/10.1007/978-1-4615-1421-3_3
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-5545-8
Online ISBN: 978-1-4615-1421-3
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