Abstract
Emerging chip scale packages (CSPs) and miniature versions of ball grid arrays (BGAs), are competing with bare die flip chip assemblies. CSP is an important miniature electronic package technology utilizing low pin counts, without the attendant handling and processing problems of low peripheral leaded packages such as thin small outline packages (TSOPs) and high-I/O (input/ output) quad flat packages (QFPs). Advantages include self-alignment capability during assembly reflow process and better lead (ball) rigidity. Reliability data and inspection techniques are needed for CSP acceptance especially for high-reliability applications.
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© 2001 Springer Science+Business Media New York
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Ghaffarian, R. (2001). Chip Scale Package Assembly Reliability. In: Puttlitz, K.J., Totta, P.A. (eds) Area Array Interconnection Handbook. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-1389-6_23
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DOI: https://doi.org/10.1007/978-1-4615-1389-6_23
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