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Wafer Bumping

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Book cover Area Array Interconnection Handbook

Abstract

Assuming that the “paradigm shift” in chip joining from peripheral wiring to area-array flip-chip technology is strategic for future electronics, there are immediate questions which emerge: Who will put bumps on chips and how? Will the same bumped chips be joined to both ceramic and organic packages? Must all chips be joined with high-melting or low-melting solders, or not with solder at all, but with conductive adhesives? This chapter will illustrate that there is presently great diversity in flip chip design and joining. There are reasonable arguments for doing essentially the same job in many different ways. You will find process and structure descriptions from numerous champions of the most prominent alternatives in chip joining without judgements or critiques as to what is good or bad. The marketplace is expected to be the ultimate sorting place which will accept some of the best, and reject others which fall short due to cost, manufacturability, reliability or functionality.

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Author information

Authors and Affiliations

  1. IBM Microelectronics, USA

    Paul Totta

  2. Unitive Electronics, USA

    Glenn Rinne

  3. Flip Chip Technologies, USA

    Peter Elenius

  4. Delphi-Delco Electronics, USA

    Michael Varnau

  5. Pac Tech-Packaging Technologies, USA

    Thomas Oppert & Elke Zakel

  6. MicroFab, USA

    Don Hayes & David Wallace

  7. SINTEF, Norway

    Helge Kristiansen

  8. Chalmers University of Technology, Sweden

    Johan Liu

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  1. Paul Totta
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Karl J. Puttlitz Paul A. Totta

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Totta, P. et al. (2001). Wafer Bumping. In: Puttlitz, K.J., Totta, P.A. (eds) Area Array Interconnection Handbook. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-1389-6_2

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  • DOI: https://doi.org/10.1007/978-1-4615-1389-6_2

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-5529-8

  • Online ISBN: 978-1-4615-1389-6

  • eBook Packages: Springer Book Archive

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