Advertisement

Abstract

This work has developed new approaches for using symbolic simulation in formal hardware verification. These approaches enlarge the reach and improve the accessibility of formal verification in contemporary design practices. We have verified important aspects of major circuits from Intel microprocessor designs with BDD-based symbolic simulation. The results of Parts I and II significantly increase the effectiveness of BDD-based symbolic simulation for contemporary design practices. The techniques presented in Part III require a more abstract design representation.

Keywords

Parametric Representation Formal Verification Pipeline Design Hardware Structure Major Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer Science+Business Media New York 2002

Authors and Affiliations

  • Robert B. Jones
    • 1
  1. 1.Strategic CAD LabsIntel CorporationUSA

Personalised recommendations