Abstract
To effectively optimize the energy efficiency of a processor system, it is critical to first understand the computational demands placed upon it and the usage model of the processor. This information is then coupled with simple CMOS circuit models suitable for deep sub-micron process technologies to define metrics that can be used to derive energy-efficient design principles.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Standard Performance Evaluation Corporation, SPEC Run and Reporting Rules for CPU95 Suites, Technical Document, Sept. 1994.
A. Chandrakasan, S. Sheng, and R.W. Brodersen, “Low-Power CMOS Digital Design”, IEEE Journal of Solid State Circuits, Apr. 1992, pp. 473–84.
A. Chandrakasan, R.W. Brodersen, Low-power Digital CMOS Design, Kluwer Academic Publishers, Boston, 1995.
M. Culbert, “Low Power Hardware for a High Performance PDA”, Proceedings of the Thirty-Ninth IEEE Computer Society International Conference, Mar. 1994, pp. 144–7.
T. Ikeda, “ThinkPad Low-Power Evolution”, Proceedings of the IEEE Symposium on Low Power Electronics, Oct. 1995, pp. 6–7.
A. Chandrakasan, A. Burstein, and R.W. Brodersen, “A Low Power Chipset for Portable Multimedia Applications”, IEEE Journal of Solid State Circuits, Vol. 29, No. 12, Dec. 1994, pp. 1415–28.
S. Kunii, “Means of Realizing Long Battery Life in Portable PCs”, Proceedings of the IEEE Symposium on Low Power Electronics,Oct. 1995, pp. 20–3.
GEC Plessey Semiconductor, ARM60 Data Sheet,Technical Document, Aug 1994.
Digital Equipment Corporation, DIGITAL Semiconductor SA-1100 Microprocessor Technical Reference Manual, Document EC-R5MTB-TE, Jan. 1998.
J. Rabaey, Digital Integrated Circuits,A Design Perspective, Prentice Hall, Upper Saddle River, NJ, 1996.
P. Landman, J. Rabaey, “Black-Box Capacitance Models for Architectural Power Analysis”, Proceedings of the 1994 International Workshop on Low-Power Design, Napa Valley, CA, April 1994.
H. Veendrick, “Short-Circuit Dissipation of Static CMOS Circuitry and Its Impact on the Design of Buffer Circuits”, IEEE Journal of Solid State Circuits, Vol. 19, No. 4, August 1984.
R. Muller, T. Kamins, Device Electronics for Integrated Circuits, Wiley, New York, 1986.
S. Sze, Physics of Semiconductor Devices, Wiley, New York, 1981.
J. Montanaro, et. al., “A 160-MHz 32-b 0.5-W CMOS RISC Microprocessor”, IEEE Journal of Solid State Circuits,Vol. 31, No. 11, Nov. 1996, pp. 1703–14.
V. De and S. Borkar, “Technology and Design Challenges for Low Power and High Performance”, Proceedings of the IEEE Symposium on Low Power Electronics and Design, Aug. 1999, pp. 163–8.
S. Mutoh, et. al., “1-V Power Supply High-Speed Digital Circuit Technology with Multithreshold-Voltage CMOS”, IEEE Journal of Solid State Circuits, Vol. 30, No. 8, Aug. 1995, pp. 847–54.
T. Kuroda, et. al., “Variable Supply-voltage Scheme for Low-power Highspeed CMOS Digital Design”, IEEE Journal of Solid State Circuits, Vol. 33, No. 3, Mar. 1998, pp. 454–62.
K. Toh, P. Ko, R. Meyer, “An Engineering Model for Short-Channel MOS Devices”, IEEE Journal of Solid-State Circuits, Vol. 23, No. 4, April 1988.
R. Pierret, Semiconductor Device Fundamentals, Addison Wesley, Reading, MA, 1996.
J. Huang, et. al., “A Robust Physical and Predictive Model for Deep-Submicrometer MOS Circuit Simulation”, Proceedings of the IEEE Custom Integrated Circuits Conference, May 1993, pp. 14.2.1–4.
M. Horowitz, T. Indermaur, and R. Gonzalez, “Low-Power Digital Design”, Proceedings of the IEEE Symposium on Low Power Electronics, Oct. 1994, pp.8–11.
Advanced RISC Machines, Ltd., ARM710 Data Sheet, Technical Document, Dec. 1994.
Integrated Device Technology, Inc., Enhanced Orion 64-Bit RISC Microprocessor, Data Sheet, Sept. 1995.
Intel Corp., Embedded Ultra-Low Power Intel486TM GX Processor, SmartDieTM Product Specification, Dec. 1995.
A. Stratakos, S. Sanders, and R.W. Brodersen, “A Low-voltage CMOS DC-DC Converter for Portable Battery-operated Systems”, Proceedings of the Twenty-Fifth IEEE Power Electronics Specialist Conference,June 1994, pp. 619–626.
A. Burstein, Speech Recognition for Portable Multimedia Terminals, Ph.D. Thesis, University of California, Berkeley, Document No. UCB/ERL M97/ 14, 1997.
A. Stratakos, High-Efficiency, Low-Voltage DC-DC Conversion for Portable Applications,Ph.D. Thesis, University of California, Berkeley, 1998.
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2002 Springer Science+Business Media New York
About this chapter
Cite this chapter
Burd, T.D., Brodersen, R.W. (2002). Energy Efficient Design. In: Energy Efficient Microprocessor Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0875-5_2
Download citation
DOI: https://doi.org/10.1007/978-1-4615-0875-5_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-5282-2
Online ISBN: 978-1-4615-0875-5
eBook Packages: Springer Book Archive