Abstract
This chapter applies techniques similar to those of Chapter 5 to provide fault tolerance to linear finite-state machines (LFSM’s) [Hadjicostis, 1999]. The discussion focuses on linear encoding techniques and, as in Chapter 5, results in a complete characterization of the class of appropriate redundant implementations. It is shown that, for a given LFSM and a given linear encoding, there exists a variety of possible implementations and that different criteria can be used to choose the most desirable one [Hadjicostis, 2000; Hadjicostis and Verghese, 2002]. The implications of this approach are demonstrated by studying hardware implementations that use interconnections of 2-input XOR gates and single-bit memory elements (flip-flops). The redundancy in the state representation (which essentially appears as a linearly encoded binary vector) is used by an external, fault-free mechanism to perform concurrent error detection and correction at the end of each time step. The assumption of a fault-free error corrector is relaxed in Chapter 7.
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References
Blahut, R. E. (1983). Theory and Practice of Data Transmission Codes. Addison-Wesley, Reading, Massachusetts.
Booth, T. L. (1968). Sequential Machines and Automata Theory. Wiley, New York.
Cattell, K. and Muzio, J. C. (1996). Analysis of one-dimensional linear hybrid cellular automata over GF(q). IEEE Transactions on Computers, 45(7):782–792.
Chakraborty, S., Chowdhury, D. R., and Chaudhuri, P. P. (1996). Theory and application of non-group cellular automata for synthesis of easily testable finite state machines. IEEE Transactions on Computers, 45(7):769–781.
Daehn, W., Williams, T. W., and Wagner, K. D. (1990). Aliasing errors in linear automata used as multiple-input signature analyzers. IBM Journal of Research and Development, 34(2–3):363–380.
Damiani, M., Olivo, P., and Ricco, B. (1991). Analysis and design of linear finite state machines for signature analysis testing. IEEE Transactions on Computers, 40(9): 1034–1045.
Gallager, R. G. (1963). Low-Density Parity Check Codes. MIT Press, Cambridge, Massachusetts.
Golomb, S. W. (1967). Shift Register Sequences. Holden-Day, San Francisco.
Hadjicostis, C. N. (1999). Coding Approaches to Fault Tolerance in Dynamic Systems. PhD thesis, EECS Department, Massachusetts Institute of Technology, Cambridge, Massachusetts.
Hadjicostis, C. N. (2000). Fault-tolerant sequence enumerators. In Proceedings of MED 2000, the 8th IEEE Mediterranean Conf. on Control and Automation.
Hadjicostis, C. N. and Verghese, G. C. (2002). Encoded dynamics for fault tolerance in linear finite-state machines. IEEE Transactions on Automatic Control. To appear.
Harrison, M. A. (1969). Lectures on Linear Sequential Machines. Academic Press, New York/London.
Huang, K.-H. and Abraham, J. A. (1984). Algorithm-based fault tolerance for matrix operations. IEEE Transactions on Computers, 33(6):518–528.
Larsen, R. W. and Reed, I. S. (1972). Redundancy by coding versus redundancy by replication for failure-tolerant sequential circuits. IEEE Transactions on Computers, 21(2): 130–137.
Martin, R. L. (1969). Studies in Feedback-Shift-Register Synthesis of Sequential Machines. MIT Press, Cambridge, Massachusetts.
Peterson, W. W. and Weldon Jr., E. J. (1972). Error-Correcting Codes. MIT Press, Cambridge, Massachusetts.
Sengupta, A., Chattopadhyay, D. K., Palit, A., Bandyopadhyay, A. K., and Choudhury, A. K. (1981). Realization of fault-tolerant machines — linear code application. IEEE Transactions on Computers, 30(3):237–240.
Wicker, S. B. (1995). Error Control Systems. Prentice Hall, Englewood Cliffs, New Jersey.
Zeigler, B. P. (1973). Every discrete input machine is linearly simulatable. Journal of Computer and System Sciences, 7(4): 161–167.
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Hadjicostis, C.N. (2002). Redundant Implementations of Linear Finite-State Machines. In: Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems. The Springer International Series in Engineering and Computer Science, vol 660. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0853-3_6
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DOI: https://doi.org/10.1007/978-1-4615-0853-3_6
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