Skip to main content

Part of the book series: The Springer International Series in Engineering and Computer Science ((SECS,volume 660))

  • 155 Accesses

Abstract

This chapter extends the algebraic approach of Chapter 3 in order to provide fault tolerance to group and semigroup machines. The discussion characterizes redundant implementations using algebraic homomorphisms and demonstrates that for a particular error-correcting scheme there exist many possible redundant implementations, each potentially offering different fault coverage [Had-jicostis, 1999]. The fault model assumes that the error detecting/correcting mechanism is fault-free and considers faults that cause the redundant machine to transition to an incorrect state. Explicit connections to hardware implementations and hardware faults are addressed in Chapter 5 for linear time-invariant dynamic systems (implemented using delay, adder and gain elements) and in Chapter 6 for linear finite-state machines (implemented using XOR gates and flip-flops). The issue of faults in the error corrector is studied in Chapter 7. Related work appeared in the context of providing fault tolerance to arbitrary finite-state machines via external monitoring mechanisms [Iyengar and Kinney, 1985; Leveugle and Saucier, 1990; Parekhji et al., 1991; Robinson and Shen, 1992; Leveugle et al., 1994; Parekhji et al., 1995]. This work, however, was not formulated in an algebraic setting and does not make use of algebraic properties and structure.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  • Abraham, J. A. and Fuchs, K. (1986). Fault and error models for VLSI. Proceedings of the IEEE, 74(5):639–654.

    Article  Google Scholar 

  • Arbib, M. A., editor (1968). Algebraic Theory of Machines, Languages, and Semigroups. Academic Press, New York.

    MATH  Google Scholar 

  • Arbib, M. A. (1969). Theories of Abstract Automata. Prentice-Hall, Englewood Cliffs, New Jersey.

    MATH  Google Scholar 

  • Ginzburg, A. (1968). Algebraic Theory of Automata. Academic Press, New York.

    MATH  Google Scholar 

  • Grillet, P. A. (1995). Semigroups. Marcel Dekker Inc., New York.

    Google Scholar 

  • Hadjicostis, C. N. (1999). Coding Approaches to Fault Tolerance in Dynamic Systems. PhD thesis, EECS Department, Massachusetts Institute of Technology, Cambridge, Massachusetts.

    Google Scholar 

  • Iyengar, V. S. and Kinney, L. L. (1985). Concurrent fault detection in microprogrammed control units. IEEE Transactions on Computers, 34(9):810–821.

    Article  Google Scholar 

  • Jacobson, N. (1974). Basic Algebra I. W. H. Freeman and Company, San Francisco.

    Google Scholar 

  • Johnson, B. (1989). Design and Analysis of Fault-Tolerant Digital Systems. Addison-Wesley, Reading, Massachusetts.

    Google Scholar 

  • Leveugle, R., Koren, Z., Koren, I., Saucier, G., and Wehn, N. (1994). The Hyeti defect tolerant microprocessor: A practical experiment and its cost-effectiveness analysis. IEEE Transactions on Computers, 43(12):1398–1406.

    Article  Google Scholar 

  • Leveugle, R. and Saucier, G. (1990). Optimized synthesis of concurrently checked controllers. IEEE Transactions on Computers, 39(4):419–425.

    Article  Google Scholar 

  • Parekhji, R. A., Venkatesh, G., and Sherlekar, S. D. (1991). A methodology for designing optimal self-checking sequential circuits. In Proceedings of the Int. Conf. VLSI Design, pages 283–291. IEEE CS Press.

    Google Scholar 

  • Parekhji, R. A., Venkatesh, G., and Sherlekar, S. D. (1995). Concurrent error detection using monitoring machines. IEEE Design and Test of Computers, 12(3):24–32.

    Article  Google Scholar 

  • Peterson, W. W. and Weldon Jr., E. J. (1972). Error-Correcting Codes. MIT Press, Cambridge, Massachusetts.

    MATH  Google Scholar 

  • Rao, T. R. N. (1974). Error Coding for Arithmetic Processors. Academic Press, New York.

    MATH  Google Scholar 

  • Robinson, S. H. and Shen, J. P. (1992). Direct methods for synthesis of self-monitoring state machines. In Proceedings of 22nd Fault-Tolerant Computing Symp., pages 306–315. IEEE CS Press.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 2002 Springer Science+Business Media New York

About this chapter

Cite this chapter

Hadjicostis, C.N. (2002). Redundant Implementations of Algebraic Machines. In: Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems. The Springer International Series in Engineering and Computer Science, vol 660. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0853-3_4

Download citation

  • DOI: https://doi.org/10.1007/978-1-4615-0853-3_4

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-5271-6

  • Online ISBN: 978-1-4615-0853-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics