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MTCMOS Combinational Circuits Using Sleep Transistors

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Abstract

The Multi-Threshold CMOS (MTCMOS) is a very attractive technique to reduce sub-threshold leakage currents during standby modes by utilizing high-V th power switches (sleep transistors). This technology is straightforward to use, because existing designs can be modified to become MTCMOS blocks by simply adding high-V th power supply switches. In addition, circuits can easily be placed in low leakage states at a fine grain level of control. For this reason, and because the time to market is critical, this technique gained the attention of the industry. Unlike the embedded MTCMOS designs discussed in Chapter 3, circuits employing high-V th sleep transistors do not require the re-designing of the original low-V th block.

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  • B. Calhoun, F. Honore, and A. Chandrakasan “Design Methodology for Fine-Grained Leakage Control in MTCMOS,” in Proc. IEEE International Symposium on Low Power Electronics and Design, August 2003. (To appear)

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  • H. Won, K. Kim, K. Jeong, K. Park, K. Choi, and J. Kong, “An MTCMOS Design Methodology and Its Application to Mobile Computing,” in Proc. IEEE International Symposium on Low Power Electronics and Design, August 2003. (To appear)

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Anis, M., Elmasry, M. (2003). MTCMOS Combinational Circuits Using Sleep Transistors. In: Multi-Threshold CMOS Digital Circuits. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0391-0_4

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  • DOI: https://doi.org/10.1007/978-1-4615-0391-0_4

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-5053-8

  • Online ISBN: 978-1-4615-0391-0

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