Functional Comparison of Logic Designs for VLSI Circuits

  • C. Leonard Berman
  • Louise H. Trevillyan


Determining whether or not two circuits are functionally equivalent is of fundamental importance in many phases of the design of computer logic. We describe a new method for circuit equivalence which proceeds by reducing the question of whether two circuits are equivalent to a number of more easily answered questions concerning the equivalence of smaller, related circuits. This method can be used to extend the power of any given equivalence-checking algorithm. We report the results of experiments evaluating our technique.


Equivalence Point Equivalence Checker Initial Equivalence Binary Decision Diagram Logic Design 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    C. Leonard Berman, “On Logic Comparison”,Proc. 18th DAC, Nashville, TN, 1981.Google Scholar
  2. [2]
    C. Leonard Berman, “Ordered Binary Decision Diagrams and Circuit Structure”, Proc. of the ICCD,Cambridge, MA, Oct 214, 1989.Google Scholar
  3. [3]
    Randal E. Bryant,“Graph Based Algorithms for Boolean Function Manipulation”,IEEE Trans. on Computers, vol. C-35, no. 8, pp. 677–691,1986.CrossRefGoogle Scholar
  4. [4]
    Steven A. Cook, “The complexity of theorem proving procedures”,Proc 3rd ACM SIGACT, pp. 151–158, 1971.Google Scholar
  5. [5]
    J.A. Darringer, D. Brand, J.V. Gerbi, W.H. Joyner and L.H. Trevillyan,“LSS: A System for Production Logic Synthesis”,IBM Journal of Research and Development,vol. 28, no. 5, pp. 537–545, Sept 1984.CrossRefGoogle Scholar
  6. [6]
    W.E. Donath and H. Ofek, “Automatic Identification of Equivalence Points for Boolean Logic Verification”, IBM Tech. Discolsure Bulletin, vol. 18, pp.2700–2703,1976Google Scholar
  7. [7]
    L.R. Ford,Jr. and D.R. Fulkerson,Flows in Networks,Princeton, NJ: Princeton University Press, 1962.MATHGoogle Scholar
  8. [8]
    M. Fujita,H. Fujiwara and N. Kawato,“Evaluation and Improvements of Boolean Comparison Method based on Binary Decision Diagrams”,Proceeding of ICCAD, Nov 1988.Google Scholar
  9. [9]
    Sharad Malik, Albert R. Wang, Robert K. Brayton and Alberto Sangiovanni-Vincentelli, “Logic Verification using Binary Decision Diagrams in a Logic Synthesis Environment”, Proceedings of ICCAD, Nov 1988.Google Scholar

Copyright information

© Springer Science+Business Media New York 2003

Authors and Affiliations

  • C. Leonard Berman
    • 1
  • Louise H. Trevillyan
    • 1
  1. 1.IBM T.J. Watson Research CenterYorktown HeightsUSA

Personalised recommendations