Abstract
The area of post layout validation deals with the qualification of the design after the physical design is completed. The relevant aspects of the validation procedure fall into the following categories:
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Design Rule Checking - DRC
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Layout vs. Schematic - LVS
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Power Analysis - IR Drop
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Noise Analysis and Coupling - Signal Integrity
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RC extraction for STA & for device simulation
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© 2003 Springer Science+Business Media New York
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Chatterjee, P. (2003). Post Layout Validation. In: Legacy Data: A Structured Methodology for Device Migration in DSM Technology. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0241-8_13
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DOI: https://doi.org/10.1007/978-1-4615-0241-8_13
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-4982-2
Online ISBN: 978-1-4615-0241-8
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