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Memristor for Neuromorphic Applications: Models and Circuit Implementations

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Book cover Memristors and Memristive Systems

Abstract

Since the first experimental evidence for the existence of the memristor in nature, a large number of memristor mathematical models have been proposed in the literature. Among them the generalized Boundary Condition Memristor model sticks out for the adaptability of the dynamics at the boundaries and for the tunability of the nonvolatile behavior. The first part of the paper describes in some detail the PSpice implementation of the generalized Boundary Condition Memristor model. Such PSpice emulator constitutes a reliable tool for computer-aided design of memristor-based circuits. As a conclusion to the first part, the use of the emulator demonstrates the ability of the memristor to capture the Hebbian learning rule, which governs the rate of change of synaptic strength in biological neural networks. The second part of the paper is devoted to the presentation of a novel class of purely passive memristor circuits. Each element from the class is composed of the cascade between a static nonlinear two-port and a linear dynamic one-port and employs solely standard electrical components from Circuit Theory. The state equations of the proposed circuits fall into the class of memristor systems.

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Notes

  1. 1.

    In the following memristive systems are referred to as memristor systems, whereas the term ideal memristor is used for systems described by (13.1).

  2. 2.

    For the sake of brevity the explicit time dependency is dropped where it is not strictly necessary.

  3. 3.

    Note that by defining a time evolution rule for the threshold voltages, it was recently demonstrated [15] that an adaptable threshold voltage-based version of the memristor model from [6] may explain the Suppression Principle [16] of the Spike-Timing-Dependent-Plasticity (STDP) Rule [6], which may occur in the case of triplet spikes.

  4. 4.

    Throughout the paper, unless stated otherwise and without loss of generality, we assume that the doped layer is spatially located to the left of the un-doped layer along the horizontal extension of the nano-film [12], and in this case we assign a value of + 1 to the memristor polarity coefficient η (see (13.6)).

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Acknowledgments

This work was partially supported by the CRT Foundation, under the project no. 2012.1121 and by the Ministry of Foreign Affairs “Con il contributo del Ministero degli Affari Esteri, Direzione Generale per la Promozione del Sistema Paese.”

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Ascoli, A., Corinto, F., Gilli, M., Tetzlaff, R. (2014). Memristor for Neuromorphic Applications: Models and Circuit Implementations. In: Tetzlaff, R. (eds) Memristors and Memristive Systems. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-9068-5_13

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