Abstract
This chapter reviews recent technology, circuits, and systems trends in memristive electronics, with particular attention to ultra-dense and energy-efficient resistive logic gates and signal processing. A reconfigurable nonvolatile computing platform that harnesses memristor properties is devised to deploy massive arrays of nanoscale resistive memory devices and advance their computing capabilities with much lowered energy consumption than the conventional charge-based VLSI systems. With application of memristive devices for stateful logic gates and multipliers, nonvolatile latches with high integration density and CMOS compatibility, combining the memristor technology with the prevailing CMOS technology pose. To prolong the Moore’s Law beyond the hitherto observed technological limitations.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
L.O. Chua, Memristor-the missing circuit element. IEEE Trans. Circuits Theory 18, 507–519 (1971)
L.O. Chua, S.M. Kang, Memristive devices and systems. Proc. IEEE 64, 209–223 (1976)
D.B. Strukov et al., The missing memristor found. Nature 453, 80–83 (2008)
ERD/ERM Final Report, ITRS (2010)
M. Di Ventra, Y.V. Preshin, L.O. Chua, Circuit elements with memory: memristors, memcapacitors, and meminductors. Proc. IEEE 97(10), 1717–1724 (2009)
D.B. Strukov, K.K. Likharev, CMOLFPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices. Nanotechnology 16, 888–900 (2005)
G.S. Snider, R.S. Williams, Nano/CMOS architectures using a field programmable nanowire interconnect. Nanotechnology 18, 035204 (2007)
S. Shin, K. Kim, S.M. Kang, Memristor-based fine resolution resistance and its applications, in ICCCAS 2009 (2009), pp. 948–951
S. Shin, K. Kim, S.M. Kang, Memristor application to programmable analog ICs. IEEE Trans. Nanotechnol. 10(2), 266–270 (2011)
D. Varghese, G. Gandhi, Memristor based high linear range differential pair, in ICCCAS 2009 (2009), pp. 935–938
Y.V. Pershin, M.D. Ventra, Practical approach to programmable analog circuits with memristors. IEEE Trans. Circuits Syst. I 57(8), 1857–1864 (2010)
S. Shin, K. Kim, S.M. Kang, Analysis of passive memristive devices array: data-dependent statistical model and self-adaptable sense resistance for RRAMs. Proc. IEEE 100(6), 2021–2032 (2012)
B. Mouttet, Proposal for memristors in signal processing. Nano-Net 2008, 11–13 (2009)
S.H. Jo et al., Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett. 10(4), 1297–1301 (2010)
D.B. Strukov, R.S. Williams, Four-dimensional address topology for circuits with stacked multilayer crossbar arrays. Proc. Natl. Acad. Sci. USA 106(48), 20155–20158 (2009)
P.J. Kuekes et al., The crossbar latch: logic value storage, restoration, and inversion in crossbar circuits. J Appl. Phys. 97, 034301 (2005)
P. Kuekes, Material implication: digital logic with memristors, in Memristor and Memristive Systems Symposium (November 21, 2008)
J. Borghetti et al., A hybrid nanomemristor/transistor logic circuit capable of self-programming. Proc. Natl. Acad. Sci. USA 106(6), 1699–1703 (2009)
J. Borghetti et al., ‘Memristive’ switches enable ‘stateful’ logic operations via material implication. Nature 464, 873–875 (2010)
K. Kim, S. Shin, S.M. Kang, Stateful logic pipeline architecture. IEEE Int. Symp. Circuits Syst. 2011, 2497–2500 (2011)
S. Shin, K. Kim, S.M. Kang, Reconfigurable stateful NOR gate for large-scale logic array integrations. IEEE Trans. Circuits Syst. II 58(7), 442–446 (2011)
K. Kim, S. Shin, S.M. Kang, Field programmable stateful logic array. IEEE Trans. Comput.-Aided Design 30(12), 1800–1813 (2011)
S.M. Kang, S. Shin, Energy-efficient memristive analog and digital electronics. Adv. Neuromorphic Memristor Sci. Appl. Springer Ser. Cogn. Neural Syst. 4, 181–209 (2012)
S. Shin, K. Kim, S.M. Kang, Memristive XOR for resistive multiplier. Electron. Lett. 48(2), 78–80 (2012)
S. Shin, K. Kim, S.M. Kang, Memristive computing-multiplication and correlation. IEEE Int. Symp. Circuits Syst. 2012, 1608–1611 (2012)
S. Shin, K. Kim, S.M. Kang, Resistie Computing: Memristors-Enabled Signal Multiplication. IEEE Trans. Circ. Syst. I 60(5), 1241–1249 (2013)
G. Gill, J. Hansen, M. Singh, Loop pipelining for high-throughput stream computation using self-timed rings, in Proceedings of ICCAD (2006), pp. 289–296
J. Hennessy, D.A. Patterson, Computer Architecture: A Quantitative Approach, 2nd edn. (Morgan Kaufmann, San Mateo, 1996)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer Science+Business Media New York
About this chapter
Cite this chapter
Kang, SM.S., Shin, S. (2014). Memristor-Based Resistive Computing. In: Tetzlaff, R. (eds) Memristors and Memristive Systems. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-9068-5_10
Download citation
DOI: https://doi.org/10.1007/978-1-4614-9068-5_10
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4614-9067-8
Online ISBN: 978-1-4614-9068-5
eBook Packages: EngineeringEngineering (R0)