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SRAM-Based Memory Operation and Yield

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Embedded Memory Design for Multi-Core and Systems on Chip

Part of the book series: Analog Circuits and Signal Processing ((ACSP,volume 116))

Abstract

The SRAM 6T cell typically is the most frequently used cell in designs requiring on-chip memory due to its fast access time and relatively small area. Its main function is to store data for the program to access; it retains the stored data so long as power is applied (volatile). The detail schematic of a 6T cell is shown in Fig. 4.1. Its design involves complex tradeoffs between the following seven factors [9, 27, 28].

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Authors and Affiliations

  1. Khalifa University of Science, Technology and Research, Abu Dhabi, United Arab Emirates

    Baker Mohammad

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  1. Baker Mohammad
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Mohammad, B. (2014). SRAM-Based Memory Operation and Yield. In: Embedded Memory Design for Multi-Core and Systems on Chip. Analog Circuits and Signal Processing, vol 116. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-8881-1_4

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  • DOI: https://doi.org/10.1007/978-1-4614-8881-1_4

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4614-8880-4

  • Online ISBN: 978-1-4614-8881-1

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