Skip to main content

A Thermal Aware Routing Algorithm for Application-Specific Network-on-Chip

  • Chapter
  • First Online:
Routing Algorithms in Networks-on-Chip
  • 2036 Accesses

Abstract

In this chapter, we propose a routing algorithm to reduce the hotspot temperature for application-specific Network-on-chip (NoC). Using the traffic information of the applications as well as the mapping of the tasks onto the NoC, we design a routing scheme which can achieve a higher adaptivity than the generic ones and at the same time distribute the traffic more uniformly across the chip. A set of admissible paths which is deadlock free for all the communications is first obtained. To reduce the hotspot temperature, we propose to route packets using the optimal distribution ratio of the communication traffic among the set of candidate paths. The problem of finding this optimal distribution ratio is formulated as a linear programming (LP) problem and is solved in the offline phase. A router microarchitecture which supports the ratio-based selection policy is also proposed. From the simulation results, the peak energy reduction considering the energy consumption of both the processor elements and routers can be as high as 20% for synthetic traffic and real benchmarks.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Notes

  1. 1.

    \(C_{n}^{r}\) is the combination notation, where \(C_{n}^{r} = \frac{n!} {r!(n-r)!}\)

References

  1. D. Atienza, E. Martinez, Inducing thermal-awareness in multicore systems using networks-on-chip, in IEEE Computer Society Annual Symposium on VLSI, ISVLSI’09, Tampa, 13–15 May 2009, pp. 187–192

    Google Scholar 

  2. L. Benini, G. De Micheli, Networks on chips: a new SoC paradigm. Computer 35(1), 70–78 (2002)

    Article  Google Scholar 

  3. D. Bertozzi, L. Benini, Xpipes: a network-on-chip architecture for gigascale systems-on-chip. IEEE Circuits Syst. Mag. 4, 18–31 (2004)

    Article  Google Scholar 

  4. D. Bertozzi, A. Jalabert, S. Murali, R. Tamhankar, S. Stergiou, L. Benini, G. De Micheli, NoC synthesis flow for customized domain specific multiprocessor systems-on-chip. IEEE Trans. Parallel Distrib. Syst. 16(2), 113–129 (2005)

    Article  Google Scholar 

  5. Booksim simulator, (2010) http://nocs.stanford.edu/

  6. R.V. Boppana, S. Chalasani, A comparison of adaptive wormhole routing algorithms, in Proceedings of the 20th Annual International Symposium on Computer Architecture, San Diego, 16–19 May 1993, pp. 351–360

    Google Scholar 

  7. C.-H Chao, K.-C. Chen, A.-Y. Wu, Routing-based traffic migration and buffer allocation schemes for three-dimensional network-on-chip systems with thermal limit. IEEE Trans. VLSI. no.99, pp.1,1, 0 (2013)

    Google Scholar 

  8. CVX: Matlab software for disciplined convex programming, (2013) http://cvxr.com/cvx

  9. M. Daneshtalab, A. Sobhani, A. Afzali-Kusha, O. Fatemi, Z. Navabi, NoC hot spot minimization using AntNet dynamic routing algorithm, in International Conference on Application-Specific Systems, Architectures and Processors, ASAP’06, Steamboat Springs, Sept 2006, pp. 33–38

    Google Scholar 

  10. J. Duato, A necessary and sufficient condition for deadlock-free adaptive routing in wormhole networks. IEEE Trans. Parallel Distrib. Syst. 6(10), 1055–1067 (1995)

    Article  Google Scholar 

  11. D. Fick, A. DeOrio, G. Chen, V. Bertacco, D. Sylvester, D. Blaauw, A highly resilient routing algorithm for fault-tolerant NoCs, in Design, Automation & Test in Europe Conference & Exhibition, DATE’09, Nice, 20–24 Apr 2009, pp. 21–26

    Google Scholar 

  12. C.J. Glass, L.M. Ni, The turn model for adaptive routing, in The 19th Annual International Symposium on Computer Architecture, Queensland, Australia, 1992, pp. 278–287

    Google Scholar 

  13. Hotspot 5.0 temperature modeling tool, (2011) http://lava.cs.virginia.edu/HotSpot

  14. J. Hu, R. Marculescu, Energy- and performance-aware mapping for regular NoC architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(4), 551–562 (2005)

    Article  Google Scholar 

  15. W. Hung, C. Addo-Quaye, T. Theocharides, Y. Xie, N. Vijakrishnan, M.J. Irwin, Thermal-aware IP virtualization and placement for networks-on-chip architecture, in IEEE International Conference on Computer Design: VLSI in Computers and Processors, San Jose, 11–13 Oct 2004, pp. 430–437

    Google Scholar 

  16. N.E. Jerger, L-S. Peh, On-Chip Networks (Morgan & Claypool, San Rafael, 2009)

    Google Scholar 

  17. Y.-C. Lan, M.C. Chen, A.P. Su, Y.-H. Hu, S.-J. Chen, Fluidity concept for NoC: a congestion avoidance and relief routing scheme, in IEEE SOC Conference, Newport Beach, 17–20 Sept 2008, pp. 65–70

    Google Scholar 

  18. G.M. Link, N. Vijaykrishnan, Hotspot prevention through runtime reconfiguration in network-on-chip, in Proceedings of the Design, Automation and Test in Europe, Munich, vol. 1, 7–11 Mar 2005, pp. 648–649

    Google Scholar 

  19. M.B. Marvasti, M. Daneshtalab, A. Afzali-Kusha, S. Mohammadi, PAMPR: power-aware and minimum path routing algorithm for NoCs, in 15th IEEE International Conference on Electronics, Circuits and Systems, St. Julien’s, 2008, pp. 418–421

    Google Scholar 

  20. Nigram simulator, (2010) http://nigram.ecs.soton.ac.uk

  21. Noxim simulator User Guide, (2010) http://www.noxim.org

  22. M. Palesi, R. Holsmark, S. Kumar, V. Catania, Application specific routing algorithms for networks on chip. IEEE Trans. Parallel Distrib. Syst. 20(3), 316–330 (2009)

    Article  Google Scholar 

  23. M. Palesi, S. Kumar, V. Catania, Bandwidth-aware routing algorithms for networks-on-chip platforms. Comput. Digit. Tech. IET 3(5), 413–429 (2009)

    Article  Google Scholar 

  24. A. Pullini, F. Angiolini, P. Meloni, D. Atienza, S. Murali, L. Raffo, G. De Micheli, L. Benini, NoC design and implementation in 65 nm technology, in First International Symposium on Networks-on-Chip, NOCS 2007, Princeton, 7–9 May 2007, pp. 273–282

    Google Scholar 

  25. Z. Qian, C.-Y. Tsui, A thermal-aware application specific routing algorithm for network-on-chip design, in 16th Asia and South Pacific IEEE/ACM Design Automation Conference (ASP-DAC), Yokohama, 25–28 Jan 2011, pp. 449,454

    Google Scholar 

  26. B.C. Schafer, T. Kim, Hotspots elimination and temperature flattening in VLSI circuits. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 16(11), 1475–1487 (2008)

    Google Scholar 

  27. L. Shang, L.-S. Peh, A. Kumar, N.K. Jha, Temperature-aware on-chip networks. IEEE Micro 26(1), 130–139 (2006)

    Article  Google Scholar 

  28. R. Tarjan, Depth-first search and linear graph algorithms. SIAM J. Comput. 1(2), 146–160 (1972)

    Article  MathSciNet  MATH  Google Scholar 

  29. S. Vangal, A. Singh, J. Howard, S. Dighe, N. Borkar, A. Alvandpour, A 5.1 GHz 0.34 mm2 router for network-on-chip applications, in IEEE Symposium on VLSI Circuits, Kyoto, 14–16 June 2007, pp. 42–43

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Zhiliang Qian .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2014 Springer Science+Business Media New York

About this chapter

Cite this chapter

Qian, Z., Tsui, CY. (2014). A Thermal Aware Routing Algorithm for Application-Specific Network-on-Chip. In: Palesi, M., Daneshtalab, M. (eds) Routing Algorithms in Networks-on-Chip. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-8274-1_11

Download citation

  • DOI: https://doi.org/10.1007/978-1-4614-8274-1_11

  • Published:

  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4614-8273-4

  • Online ISBN: 978-1-4614-8274-1

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics