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Atomistic Modeling of Defects Implicated in the Bias Temperature Instability

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Bias Temperature Instability for Devices and Circuits

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Abstract

Capture and emission of carriers by point defects in gate dielectrics, such as SiO2 and HfO2, and at their interfaces with the substrate are thought to be responsible for performance and reliability issues in MOS devices, particularly dielectric degradation and the bias temperature instability (BTI). Ultra-thin silicon dioxide films are present at the interface between Si and high-κ oxides; thus it is hoped that understanding the defects in silica which contribute to BTI will also aid the reliability of devices containing high-κ oxides. This chapter reviews the state of the art of modeling oxygen deficiency defects implicated in both electron and hole trapping in amorphous silica (a-SiO2).

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Acknowledgements

We would like to acknowledge the financial support from EPSRC and the EU FP7 project MORDRED (FP7-NMP-2010-SMALL-4). The authors are grateful to V. Afanas’ev, A. Asenov, G. Bersuker, M.B. Watkins, S. Ling, S.R. Bradley, and F. Schanovsky for useful discussions.

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Authors and Affiliations

  1. Department of Physics and Astronomy, University College London, Gower Street, London, WC1E 6BT, UK

    Al-Moatasem El-Sayed

  2. Department of Physics and Astronomy and London Centre for Nanotechnology, 17-19 Gordon Street, London, WC1H 0AH, UK

    Alexander L. Shluger

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  1. Al-Moatasem El-Sayed
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  2. Alexander L. Shluger
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Correspondence to Al-Moatasem El-Sayed .

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  1. Institute for Microelectronics, Technische Universität Wien, Wien, Austria

    Tibor Grasser

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El-Sayed, AM., Shluger, A.L. (2014). Atomistic Modeling of Defects Implicated in the Bias Temperature Instability. In: Grasser, T. (eds) Bias Temperature Instability for Devices and Circuits. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-7909-3_12

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  • DOI: https://doi.org/10.1007/978-1-4614-7909-3_12

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