Abstract
A rapid surge in the consumer electronics revolution of the past decade may be attributed to the advancement in automated design techniques for system-on-chips (SoCs). SoCs are designed by reusing many different intellectual property (IP) blocks, that are integrated using a common platform, such as a set of standard buses from a given vendor, like ARM. While there have been considerable progress of SoC design techniques such as platform-based design and the reuse methodology manual-based design, system-level verification still poses considerable challenges. For example, it has been a widely accepted fact that the system-level verification phase often consumes about 50–80% of the overall design effort. This problem is exacerbated in safety-critical systems such as medical devices. This chapter develops a correct-by-construction design flow for SoCs. This is achieved by augmenting existing design flows with a systematic approach to system-level verification. We motivate this design-flow using a mobile phone SoC example and also outline how this design-flow is presented in the rest of this book.
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Notes
- 1.
This is unlike the approach taken by a single design team to apply the full life cycle to the development of a complete SoC as was done for the SUN SPARC [KB02].
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Sinha, R., Roop, P., Basu, S. (2014). System-on-a-Chip Design. In: Correct-by-Construction Approaches for SoC Design. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-7864-5_1
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DOI: https://doi.org/10.1007/978-1-4614-7864-5_1
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