Design Space Exploration for MBC Based Generic Reconfigurable Computing Framework
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This chapter describes the design space exploration for a MBC based generic reconfigurable framework. Design space exploration identifies the appropriate values for several design parameters of the framework based upon the technology node, the applications being mapped and the power and performance constraints provided to the MBC software flow. To be specific, the exploration phase determines the configuration for both compute blocks (MLBs) and the programmable interconnect. For this exploration, information regarding the variation in design overhead with varying specification for individual hardware components of the MBC framework must be provided to the software flow. The MBC software flow by itself generates an exhaustive combination of all design points ensuring that at each design point a given input application can be mapped to the MBC framework. A mapping result (power and performance) is generates for each of these design points. The user may then select one of the design points based on whether power and performance is more critical to mapping the input application.
KeywordsFunction Table Design Space Exploration Technology Node Benchmark Circuit Single Partition
- 1.M. Hansen, H. Yalcin, J. Hayes, “Unveiling the ISCAS-85 benchmarks: A case study in reverse engineering”. IEEE Des. Test Comput. (1999)Google Scholar
- 2.[Online], “iFAR – intelligent FPGA Architecture Repository”. http://www.eecg.utoronto.ca/vpr/architectures/
- 3.[Online], “Predictive Technology Model”. http://ptm.asu.edu/
- 4.[Online], “Stratix Family of FPGAs”. www.altera.com